ISP1581
Hi-Speed USB peripheral controller
Philips Semiconductors
Table 30: DMA commands
Code (Hex) Name
Description
00
GDMA Read
Generic DMA IN token transfer (slave mode only):
Data is transferred from the external DMA bus to the
internal buffer. Strobe: DIOW by external DMA
Controller.
01
GDMA Write
Generic DMA OUT token transfer (slave mode
only): Data is transferred from the internal buffer to the
external DMA bus. Strobe: DIOR by external DMA
Controller.
02
03
04
UDMA Read
UDMA Write
PIO Read[1]
UDMA Read command: Data is transferred from the
external DMA to the internal DMA bus.
UDMA Write command: Data is transferred in UDMA
mode from the internal buffer to the external DMA bus.
PIO Read command for ATAPI device: Data is
transferred in PIO mode from the external DMA bus to
the internal buffer. Data transfer starts when IORDY is
asserted. Inputs DREQ and DACK are ignored.
05
PIO Write[1]
PIO Write command for ATAPI device: Data is
transferred in PIO mode from the internal buffer to the
external DMA bus. Data transfer starts when IORDY is
asserted. Inputs DREQ and DACK are ignored.
06
07
0A
MDMA Read
MDMA Write
Read 1F0
Multiword DMA Read: Data is transferred from the
external DMA bus to the internal buffer.
Multiword DMA Write: Data is transferred from the
internal buffer to the external DMA bus.
Read at address 01F0H: Initiates a PIO Read cycle
from Task File 1F0. Before issuing this command the
task file byte count should be programmed at address
1F4H (LSB) and 1F5H (MSB).
0B
0C
Poll BSY
Poll BSY status bit for ATAPI device: Starts repeated
PIO Read commands to poll the BSY status bit of the
ATAPI device. When BSY = 0, polling is terminated and
an interrupt is generated.
Read Task Files
Read Task Files: Reads all task file registers except
1F0H and 1F7H. When reading has been completed,
an interrupt is generated.
0D
0E
-
reserved
Validate Buffer
Validate Buffer (for debugging only): Request from
the microcontroller to validate the endpoint buffer
following an ATA to USB data transfer.
0F
10
Clear Buffer
Restart
Clear Buffer: Request from the microcontroller to clear
the endpoint buffer after a USB to ATA data transfer.
Restart: Request from the microcontroller to move the
buffer pointers to the beginning of the endpoint FIFO.
9397 750 13462
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 06 — 23 December 2004
31 of 79
NXP [ NXP ]
