ISP1160
Embedded USB Host Controller
Philips Semiconductors
Bit
15
14
13
12
11
10
9
8
Symbol
Reset
Access
Bit
reserved
FR[13:8]
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
Symbol
Reset
Access
FR[7:0]
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Table 23: HcFmRemaining register: bit description
Bit
Symbol
Description
31
FRT
FrameRemainingToggle: This bit is loaded from the
FrameIntervalToggle field of the HcFmInterval register whenever
FrameRemaining reaches 0. This bit is used by the HCD for
synchronization between FrameInterval and FrameRemaining.
30 to 14
13 to 0
-
reserved
FR[13:0]
FrameRemaining: This counter is decremented at each bit time.
When it reaches zero, it is reset by loading the FrameInterval value
specified in the HcFmInterval register at the next bit time boundary.
When entering the USBOperational state, the HC reloads it with
the content of the FrameInterval part of the HcFmInterval register
and uses the updated value from the next SOF.
10.2.3 HcFmNumber register (R: 0FH)
The HcFmNumber register is a 16-bit counter. It provides a timing reference for
events happening in the HC and the HCD. The HCD may use the 16-bit value
specified in this register and generate a 32-bit frame number without requiring
frequent access to the register.
Code (Hex): 0F — read
Table 24: HcFmNumber register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
Reset
Access
Bit
reserved
reserved
FN[15:8]
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
23
22
21
20
19
18
17
16
Symbol
Reset
Access
Bit
0
R
0
R
0
R
0
R
0
R
0
R
0
R
9
0
R
8
15
14
13
12
11
10
Symbol
Reset
Access
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
9397 750 11371
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 04 — 04 July 2003
46 of 88
NXP [ NXP ]
