Philips Semiconductors
Product specification
PowerMOS transistor
Avalanche energy rated
IRF840
20
IF, Source-Drain diode current (Amps)
VGS = 0 V
PHP8N50
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Gate-source voltage, VGS (V)
ID = 8.5A
Tj = 25 C
100V
VDD = 400 V
200V
PHP8N50E
15
10
150 C
5
Tj = 25 C
0
20
40
Gate charge, QG (nC)
60
80
0
0
0.2
0.4
0.6
0.8
1
VSDS, Source-Drain voltage (Volts)
1.2
1.4
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); parameter V
DS
Switching times (ns)
VDD = 250 V
VGS = 10 V
RD = 30 Ohms
Tj = 25 C
PHP8N50
10
Fig.16. Source-Drain diode characteristic.
I
F
= f(V
SDS
); parameter T
j
1000
Non-repetitive Avalanche current, IAS (A)
25 C
Tj prior to avalanche = 125 C
100
td(off)
1
VDS
tf
tr
td(on)
10
0
10
20
30
40
RG, Gate resistance (Ohms)
50
60
tp
ID
PHP8N50E
1E-05
1E-04
Avalanche time, tp (s)
1E-03
1E-02
0.1
1E-06
Fig.14. Typical switching times; t
d(on)
, t
r
, t
d(off)
, t
f
= f(R
G
)
Fig.17. Maximum permissible non-repetitive
avalanche current (I
AS
) versus avalanche time (t
p
);
unclamped inductive load
1.15
1.1
1.05
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
10
Maximum Repetitive Avalanche Current, IAR (A)
Tj prior to avalanche = 25 C
1
1
0.95
0.9
0.85
-100
125 C
0.1
PHP8N50E
0.01
1E-06
-50
0
50
Tj, Junction temperature (C)
100
150
1E-05
1E-04
Avalanche time, tp (s)
1E-03
1E-02
Fig.15. Normalised drain-source breakdown voltage;
V
(BR)DSS
/V
(BR)DSS 25 ˚C
= f(T
j
)
Fig.18. Maximum permissible repetitive avalanche
current (I
AR
) versus avalanche time (t
p
)
March 1999
5
Rev 1.000
PHILIPS [ NXP SEMICONDUCTORS ]
