NXP Semiconductors
HEF4094B
8-stage shift-and-store register
11. Waveforms
1/f
max
V
I
CP input
GND
t
W
t
PLH
V
OH
QPn, QS1 output
V
OL
t
PLH
V
OH
QS2 output
V
OL
V
M
001aaf113
V
M
t
PHL
V
M
t
PHL
Measurement points are given in
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 7.
Table 9.
V
DD
Clock to outputs propagation delays, and clock pulse width and maximum frequency
Measurement points
Input
V
M
0.5V
DD
Output
V
M
0.5V
DD
V
X
0.1V
DD
V
Y
0.9V
DD
Supply voltage
5 V to 15 V
V
I
STR input
GND
t
W
t
PLH
V
OH
QPn output
V
OL
V
M
001aaj058
V
M
t
PHL
Measurement points are given in
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 8.
Strobe to output propagation delays, and strobe pulse width, set up and hold times
HEF4094B
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 11 — 29 August 2013
9 of 20
PHILIPS [ NXP SEMICONDUCTORS ]
