NXP Semiconductors
HEF4094B
8-stage shift-and-store register
V
I
OE input
GND
t
PLZ
V
DD
output
LOW-to-OFF
OFF-to-LOW
V
OL
t
PHZ
V
OH
output
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
V
Y
V
M
V
M
t
PZL
V
M
V
X
t
PZH
outputs
disabled
outputs
enabled
001aai545
Measurement points are given in
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 9.
3-state output enable and disable times for OE input
V
I
CP input
GND
t
su
t
h
V
I
D input
GND
V
M
t
su
t
h
V
M
V
OH
QPn, QS1, QS2 output
V
OL
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V
M
Measurement points are given in
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 10. Data input data set up and hold times
HEF4094B
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 11 — 29 August 2013
10 of 20
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