PI6C2308
3.3V Zero Delay Buffer
PinDescription
Pin
1
Signal
REF(1)
Description
Input reference frequency, 5V tolerant input, allows spread spectrum clock input
2
CLKA1(2)
CLKA2(2)
VDD
Clock output, Bank A
Clock output, Bank A
3.3V supply
3
4
5
GND
Ground
6
CLKB1(2)
CLKB2(2)
S2(3)
Clock output, Bank B
Clock output, Bank B
Select input, bit 2
Select input, bit 1
Clock output, Bank B
Clock output, Bank B
Ground
7
8
9
S1(3)
10
11
12
13
14
15
16
CLKB3(2)
CLKB4(2)
GND
VDD
3.3V, supply
CLKA3(2)
CLKA4(2)
FBK
Clock output, Bank A
Clock output, Bank A
PLL feedback input
ElectricalCharacteristicsforCommercialTemperatureDevices
Parameter
Description
Input LOW Voltage(4)
Input HIGH Voltage(4)
Input LOW Current
Input HIGH Current
Test Conditions
Min.
Max.
Units
VIL
VIH
IIL
0.8
V
2.0
VIN = 0V
50
µA
IIH
VIN = VDD
100
IOL = 8mA (1, 2, 3,4, 6)
OL = 12mA (-1H)
VOL
Output LOW Voltage(5)
Output HIGH Voltage(5)
0.4
I
V
IOH = 8mA (1, 2, 3,4, 6)
IOH = 12mA (-1H)
VOH
2.4
IDD (PD mode)
Power Down Supply Current REF = 0 MHz
12
39
54
µA
mA
Unloaded outputs, 66.66 MHz,
IDD
IDD
Supply Current
Supply Current
Select inputs at VDD or GND
Unloaded outputs 100 MHz Select
Inputs @ VDD or GND
PS8384D
06/26/01
4