PI6C2308
3.3V Zero Delay Buffer
Zero Delay and Skew Control
REF.InputtoCLKA/CLKBDelayvs.DifferenceinLoadingbetweenFBKpinandCLKA/CLKBpins
For applications requiring zero input-output delay, all outputs
including the one providing feedback should be equally loaded. If
input-output delay adjustments are required, use the above graph to
calculate loading differences between the feedback output and
remaining outputs.
To close the feedback loop of the PI6C2308, the FBK pin can be
driven from any of the 8 available output pins. The output driving
theFBKpinwillbedrivingatotalloadof7pFplusanyadditionalload
that it drives. The relative loading of this output (with respect to the
remainingoutputs)canadjusttheinput-outputdelay. Thisisshown
in the graph above.
OperatingConditions
(Overoperatingrange,TA =0ºCto+70°C,VCC =3.3V±0.3V)
MaximumRatings
Supply Voltage to Ground Potential ...................0.5Vto+7.0V
Parameter
Description
Supply Voltage
Min.
Max. Units
DCInputVoltage(ExceptREF) ..................0.5VtoV +0.5V
DD
VDD
3.0
3.6
70
V
DCInputVoltageREF................................................ 0.5to7V
StorageTemperature........................................ 65ºCto+150ºC
MaximumSolderingTemperature(10seconds)................ 260ºC
Junction Temperature ....................................................... 150ºC
StaticDischargeVoltage
Operating Temperature
(Ambient)
TA
0
ºC
CL
Load Capacitance
Input Capacitance
30
7
pF
CIN
(perMIL-STD-883,Method3015).................................. >2000V
PS8384D
06/26/01
3