PFS122
8bit MTP MCU with 12-bit R-Type ADC
(6) .ADJUST_IC
SYSCLK=ILRC, IHRC=16MHz, VDD=5V
After boot up, CLKMD = 0XE4：
IHRC frequency is calibrated to 16MHz@VDD=5V and IHRC module is disabled
System CLK = ILRC
Watchdog timer is disabled, ILRC is enabled, PA5 is input mode
(7) .ADJUST_IC
DISABLE
After boot up, CLKMD is not changed (Do nothing)：
IHRC is not calibrated and IHRC module is disabled by Boot-up Time
System CLK = ILRC or IHRC/64 (by Boot-upTime)
Watchdog timer is enabled, ILRC is enabled, PA5 is in input mode
5.4.4. External Crystal Oscillator
If crystal oscillator is used, a crystal or resonator is required between X1 and X2. Fig.2 shows the hardware
connection under this application; the range of operating frequency of crystal oscillator can be from 32 KHz to
4MHz, depending on the crystal placed on; higher frequency oscillator than 4MHz is NOT supported.
(Select driving current for oscillator)
eoscr[6:5]
(Enable crystal oscillator)
eoscr.7
C1
PA7/X1
System clock = EOSC
PA6/X2
C2
The values of C1 and C2 should depend on
the specification of crystal.
Fig.2: Connection of crystal oscillator
Besides crystal, external capacitor and options of PFS122 should be fine tuned in eoscr (0x0a) register to
have good sinusoidal waveform. The eoscr.7 is used to enable crystal oscillator module, eoscr.6 and eoscr.5
are used to set the different driving current to meet the requirement of different frequency of crystal oscillator:
eoscr.[6:5]=01 : Low driving capability, for lower frequency, ex: 32KHz crystal oscillator
eoscr.[6:5]=10 : Middle driving capability, for middle frequency, ex: 1MHz crystal oscillator
eoscr.[6:5]=11 : High driving capability, for higher frequency, ex: 4MHz crystal oscillator
Table 4 shows the recommended values of C1 and C2 for different crystal oscillator; the measured start-up
time under its corresponding conditions is also shown. Since the crystal or resonator had its own
characteristic, the capacitors and start-up time may be slightly different for different type of crystal or
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PDK-DS-PFS122-EN_V000-May 28, 2020
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