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NCN8024RDWR2G 参数 Datasheet PDF下载

NCN8024RDWR2G图片预览
型号: NCN8024RDWR2G
PDF下载: 下载PDF文件 查看货源
内容描述: [智能卡接口]
分类和应用:
文件页数/大小: 16 页 / 235 K
品牌: ONSEMI [ ONSEMI ]
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NCN8024R  
CMDVCC  
CRD_RST  
CRD_CLK  
CRD_IO  
CRD_VCC  
t
deact  
Figure 6. Deactivation Sequence  
FAULT DETECTION  
Card pin current limitation: in the case of a short circuit  
to ground. No feedback is provided to the external MPU.  
LDO operation: the internal circuit continuously senses  
In order to protect both the interface and the external smart  
card, the NCN8024R provides security features to prevent  
failures or damages as depicted here after.  
the CRD_V voltage (in the case of either over or  
CC  
Card extraction detection  
under voltage situation).  
V under voltage detection  
DD  
LDO operation: undervoltage detection on V  
overload on VUP  
or  
DDP  
Shortcircuit or overload on CRD_V  
CC  
Overheating  
Card pin current limitation: in the case of a short circuit  
to ground. No feedback is provided to the external  
MPU  
CRD_PRES  
INT  
CMDVCC  
Debounce  
Debounce  
CRD_VCC  
Powerdown Resulting of  
Card Extraction  
Powerdown Caused by  
ShortCircuit  
Figure 7. Fault Detection and Interrupt Management  
Interrupt Pin Management:  
A card session is opened by toggling CMDVCC High to  
Low.  
Before a card session, CMDVCC is supposed to be in a  
High position. INT is Low if no card is present in the card  
connector (Normally open or normally closed type). INT is  
High if a card is present. If a card is inserted (INT = High)  
During a card session, CMDVCC is Low and INT pin  
goes Low when a fault is detected. In that case a deactivation  
is immediately and automatically performed (see Figure 6).  
When the microcontroller resets CMDVCC to High it can  
sense the INT level again after having got completed the  
deactivation.  
As illustrated by Figure 7 the device has a debounce timer  
of 8 ms typical duration. When a card is inserted, output INT  
goes High only at the end of the debounce time. When the  
card is removed a deactivation sequence is automatically  
and immediately performed and INT goes Low.  
and if V drops below the UVLO threshold then INT pin  
DD  
drops Low immediately. It turns back High when V  
increases again over the UVLO limit (including hysteresis),  
a card being still present.  
DD  
http://onsemi.com  
12  
 
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