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ADP3212 参数 Datasheet PDF下载

ADP3212图片预览
型号: ADP3212
PDF下载: 下载PDF文件 查看货源
内容描述: 7位可编程, 3相,移动CPU同步降压控制器 [7-Bit Programmable, 3-Phase, Mobile CPU Synchronous Buck Controller]
分类和应用: 控制器
文件页数/大小: 43 页 / 1255 K
品牌: ONSEMI [ ONSEMI ]
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ADP3212/NCP3218  
pin voltage drops to less than −300 mV, the low-side MOSFETs  
is turned off. DRVL outputs are allowed to turn back on when  
the CSREF voltage recovers to greater than −100 mV.  
OUTPUT CROWBAR  
To prevent the CPU and other external components from  
damage due to overvoltage, the ADP3212/NCP3218 turns off  
the DRVH1 and DRVH2 outputs and turns on the DRVL1 and  
DRVL2 outputs when the output voltage exceeds the OVP  
threshold (1.55 V typical).  
OUTPUT ENABLE AND UVLO  
For the ADP3212/NCP3218 to begin switching, the VCC supply  
voltage to the controller must be greater than the VCCOK  
threshold and the EN pin must be driven high. If the VCC  
voltage is less than the VCCUVLO threshold or the EN pin is a logic  
low, the ADP3212/NCP3218 shuts off. In shutdown mode, the  
controller holds the PWM outputs low, shorts the capacitors of  
the SS and PGDELAY pins to ground, and drives the DRVH  
and DRVL outputs low.  
Turning on the low-side MOSFETs forces the output capacitor  
to discharge and the current to reverse due to current build up  
in the inductors. If the output overvoltage is due to a drain-  
source short of the high-side MOSFET, turning on the low-side  
MOSFET results in a crowbar across the input voltage rail. The  
crowbar action blows the fuse of the input rail, breaking the  
circuit and thus protecting the microprocessor from  
destruction.  
The user must adhere to proper power-supply sequencing during  
startup and shutdown of the ADP3212/NCP3218. All input pins  
must be at ground prior to removing or applying VCC, and all  
output pins should be left in high impedance state while VCC is  
off.  
When the OVP feature is triggered, the ADP3212/NCP3218 is  
latched off. The latch-off function can be reset by removing and  
reapplying VCC to the ADP3212/NCP3218 or by briefly pulling  
the EN pin low.  
THERMAL THROTTLING CONTROL  
The ADP3212/NCP3218 includes a thermal monitoring circuit  
to detect whether the temperature of the VR has exceeded a  
user-defined thermal throttling threshold. The thermal  
monitoring circuit requires an external resistor divider  
connected between the VCC pin and GND. The divider consists  
of an NTC thermistor and a resistor. To generate a voltage that  
is proportional to temperature, the midpoint of the divider is  
connected to the TTSNS pin. An internal comparator circuit  
compares the TTSNS voltage to half the VCC threshold and  
outputs a logic level signal at the VRTT output when the  
temperature trips the user-set alarm threshold. The VRTT  
output is designed to drive an external transistor that in turn  
provides the high current, open-drain VRTT signal required by  
the IMVP-6.5 specification. The internal VRTT comparator has a  
hysteresis of approximately 100 mV to prevent high frequency  
oscillation of VRTT when the temperature approaches the set  
alarm point.  
Pulling TTSNS to less than 1 V disables the overvoltage  
protection function. In this configuration, VRTT should be tied  
to ground.  
REVERSE VOLTAGE PROTECTION  
Very large reverse current in inductors can cause negative VCORE  
voltage, which is harmful to the CPU and other output  
components. The ADP3212/NCP3218 provides a reverse  
voltage protection (RVP) function without additional system  
cost. The VCORE voltage is monitored through the CSREF pin.  
When the CSREF pin voltage drops to less than −300 mV, the  
ADP3212/NCP3218 triggers the RVP function by disabling all  
PWM outputs and driving DRVL1 and DRVL2 low, thus  
turning off all MOSFETs. The reverse inductor currents can be  
quickly reset to 0 by discharging the built-up energy in the  
inductor into the input dc voltage source via the forward-biased  
body diode of the high-side MOSFETs. The RVP function is  
terminated when the CSREF pin voltage returns to greater than  
−100 mV.  
OUTPUT CURRENT MONITOR  
The ADP3212/NCP3218 has an output current monitor. The  
IMON pin sources a current proportional to the inductor  
current. A resistor from IMON pin to FBRTN sets the gain. A  
0.1 μF is added in parallel with RMON to filter the inductor  
ripple. The IMON pin is clamped to prevent it from going  
above 1.15V.  
Sometimes the crowbar feature inadvertently causes output  
reverse voltage because turning on the low-side MOSFETs  
results in a very large reverse inductor current. To prevent  
damage to the CPU caused from negative voltage, the  
ADP3212/NCP3218 maintains its RVP monitoring function  
even after OVP latch-off. During OVP latch-off, if the CSREF  
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