FEDL87V5002-01
OKI Semiconductor
ML87V5002
FUNCTIONAL OPERATION
Mode of Operation
The ML87V5002 has two modes, 2-channel mode and 8-channel mode. Mode setting is done by the host CPU via
the I2C interface. When internal register “NOF_CH” ( SUB:00h-bit[2] ) is set to “0”, the 2-channel mode is set.
When “NOF_CH” is set to “1”, the 8-channel mode is set.
• 2-channel mode
In the 2-channel mode, there are four input groups, group0-3. The inputs in group-0 are comprised of
LRCK0,BCKI0 and DI0. The inputs in group-1 are LRCK1, BCK1 and DI1. The inputs in group-2 are LRCKI2,
BCKI2 and DI2. The inputs in group-3 are LCRKI3, BCKI3 and DI3. That is, in the 2-channel mode, it looks four
independent delay devices having a common 2-channel input can be provided. The common 2-channel input is
connected to the output terminal of the selector that has four input as shown in Fig.7. One of the four inputs can be
selected by the setting of the internal register “DI_SEL” ( SUB:00h-bit[1:0] ) as shown in the Table 2.
Table 2 Input Source Selection (SUB:00h-bit[1:0])
DI_SEL
Selectable Input
Source
[1]
0
[0]
0
DI0
DI1
DI2
DI3
0
1
1
0
1
1
The 2-channel input audio data is selected and transferred to the four delay devices via the common input terminal
and being delayed for certain periods. The delayed data are output from DO0 - DO3 controlled by LRCKO and
BCKO. Each delay time for the DO0 - DO3 can be set independently by the setting of internal regisiter,
“DLYx_L” ( x=0 - 7, SUB:10h-bit[7:0] - SUB:1fh-bit[7:0]) and “DLYx_H” ( x=0 - 7, SUB:10h-bit[7:0] -
SUB:1fh-bit[7:0]). The settings are shown in the Table 3.
Table 3 Delay Time Setting of Each Output
L/R
Channel
Register Name
DLY0_L
DLY0_H
DLY1_L
DLY1_H
DLY2_L
DLY2_H
DLY3_L
DLY3_H
DLY4_L
DLY4_H
DLY5_L
DLY5_H
DLY6_L
DLY6_H
DLY7_L
DLY7_H
SUB
10h-bit[7:0]
11h-bit[7:0]
12h-bit[7:0]
13h-bit[7:0]
14h-bit[7:0]
15h-bit[7:0]
16h-bit[7:0]
17h-bit[7:0]
18h-bit[7:0]
19h-bit[7:0]
1ah-bit[7:0]
1bh-bit[7:0]
1ch-bit[7:0]
1dh-bit[7:0]
1eh-bit[7:0]
1fh-bit[7:0]
Lch
CH0
DO0 Delay Time
DELAY0
Rch
Lch
Rch
Lch
Rch
Lch
Rch
CH1
CH2
CH3
CH4
CH5
CH6
CH7
DO1 Delay Time
DELAY1
DO2 Delay Time
DELAY2
DO3 Delay Time
DELAY3
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