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ML87V5002 参数 Datasheet PDF下载

ML87V5002图片预览
型号: ML87V5002
PDF下载: 下载PDF文件 查看货源
内容描述: [Consumer Circuit, PDSO32, TSOP1-32]
分类和应用: 光电二极管商用集成电路
文件页数/大小: 36 页 / 309 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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FEDL87V5002-01  
OKI Semiconductor  
ML87V5002  
Figure 8 shows the concept of the 2-channel mode.  
DI0  
DI1  
DI2  
DI3  
DELAY0 (L/R)  
DO0  
DELAY1 (L/R)  
DELAY2 (L/R)  
DELAY3 (L/R)  
DO1  
DO2  
DO3  
Selector  
*1. DELAY0 (L/R), DELAY1 (L/R), DELAY2 (L/R), and DELAY3 (L/R) can be set independently.  
*2. The input format and sampling frequency for each of DI0 to DI3 can be set.  
*3. The output format and the input format can be set independently, however, the output format for DO0 to DO3  
is equal.  
Figure 8 Conceptual Diagram of 2-Channel Mode  
8-channel mode  
In the 8-channel mode the ML87V5002 operates as an 8-channel audio interface input. In this case, LRCKI0 and  
BCKI0 are used. Note that LRCKI1, LRCKI2, LRCKI3, BCKI1, BCKI2 and BCKI3 are not used in the 8-channel  
mode. The data of each channel is input to DI0 to DI3 and is delayed for the set delay time. The data input to DI0  
to DI3 are output from DO0 to DO3 having certain delay times, respectively. The delay time of each input can be  
set by the internal registers “DLYx_L” (x=0 to 7, SUB:10h-bit[7:0] to SUB:1fh-bit[7:0]) and “DLYx_H” (x=0 to 7,  
SUB:10h-bit[7:0] to SUB:1fh-bit[7:0]).  
Figure 9 shows the concept of 8-channel mode  
DELAY0 (L/R)  
DO0  
DO1  
DO0  
DO1  
DELAY1 (L/R)  
DELAY2 (L/R)  
DELAY3 (L/R)  
DO2  
DO3  
DO2  
DO3  
*4. DELAY0 (L/R), DELAY1 (L/R), DELAY2 (L/R), and DELAY3 (L/R) can be set independently.  
*5. The output format and the input format can be set independently.  
Figure 9 Conceptual Diagram of 8-Channel Mode  
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