FEDL87V5002-01
OKI Semiconductor
ML87V5002
BLOCK DIAGRAM
Through-Mode Setting
2-Mbit DRAM
LRCKO
BCKO
DO0-3
LRCKI0-3
BCKI0-3
DI0-3
Input Interface
Block
Output Interface
Block
DRAM
Control
Input Timing
Control
Output Timing
Control
SYSCLK
RESET
Host Interface
Block
SDA
SCL
INT
Register
(I2C)
PIN CONFIGURATION (TOP VIEW)
1
32
31
30
29
VSS
SYSCLK
LRCKI0
BCKI0
DI0
LRCKI1
BCKI1
DI1
VCC
LRCK0
BCK0
DO0
DO1
DO2
DO3
VSS
SDA
SCL
INT
RESET
2
3
4
5
6
28
27
26
25
24
23
22
21
20
19
18
17
7
8
VCC
9
LRCKI2
BCKI2
DI2
LRCKI3
BCKI3
DI3
10
11
12
13
14
15
16
MODE0
MODE1
MODE2
VCC
VSS
32-Pin Plastic TSOP Type I
2/36
OKI [ OKI ELECTRONIC COMPONETS ]
