PEDL87V21071-01
OKI Semiconductor
ML87V21071
2.2.3 Memory Control Setting 1 (write stop)
SUB_ADDRESS = 43h(W/R): Memory write stop setting
DATA_BIT
BIT7
BIT6
BIT5
BIT4
1
BIT3
0
BIT2
2
BIT1
BIT0
0
STLM
STL
1
Register name (Reserved) (Reserved) (Reserved)
STL[2:0] Initial value: 000; Setting range: Refer to Table R2-2-3.
Sets input data write stop control.
When data write stops, holds the field data just before the data write stops.
While INPR is set to 1, the setting of SLT[2:1] is disabled.
Table R2-2-3 (1) Input Data Write Stop Setting
STL
Input data write
[2]
0
[1]
0
[0]
0
Possible (field B recovery)
Possible (field A recovery)
Possible (arbitrary field recovery)
Stop (field A data hold)
0
1
0
1
X
0
0
0
1
0
1
1
Stop (field B data hold)
1
X
1
Stop (arbitrary field data hold)
STLM Initial value: 0; Setting range: 0 to 1
Sets output when input data writing stop is controlled.
While INPR is set to 1, this setting is disabled.
Table R2-2-3 (2) Output Mode Settings when Input Data Writing is Stopped
STLM
Output mode
[1]
X
0
[0]
0
Field output mode
1
1
Frame output mode (normal)
Frame output mode (median)
1
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