FEDL7033-02
ML7033
1
Semiconductor
Table 6 SLIC Device Operation Mode and Detector Mode
Operating Mode
Low Power Standby
Forward Active
Unbalanced Ringing
Reverse Active
Ringing
Forward Loop Back
Tip Open
Power Denial
F2_n F1_n F0_n E0_n = 1
E0_n = 0
GKD
GKD
RTD
GKD
RTD
GKD
GKD
n/a
Description
Standby mode
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
SHD
SHD
RTD
SHD
RTD
SHD
SHD
n/a
Forward battery loop feed
Unbalanced ringing mode
Reverse battery loop feed
Balanced ringing mode
Test mode
For PBX type application
Device shutdown
SHD: Switch Hook Detection RTD: Ring Trip Detection GKD:Ground Key Detection
BSEL1, BSEL2
The BSELn pin is the battery mode selection data output. This pin is used when the SLIC connected to the
corresponding channel is an Intersil RSLICTM series SLIC device. A logic “0” on this pin selects the low battery
mode, and the logic “1” selects the high battery mode within the SLIC device. The output levels from the BSELn
pins are determined by the BSELn register bits (CR6-B3/CR13-B3).
By connecting these outputs directly to the corresponding SLIC device input pins, battery mode selection of the
SLIC is possible. This pin remains functional even in power-down mode.
SWC1, SWC2
The SWCn pin is the uncommitted switch control data output. This pin is used when the SLIC connected to the
corresponding channel is an Intersil RSLICTM series SLIC device. By connecting this pin directly to the
corresponding input pin of the SLIC device, the uncommitted switch control can be made. The uncommitted
switch is located between the SW+ pin and the SW- pin. A logic “0” on this pin enables the SLIC internal switch
on, and a logic “1” disables the switch.
The output levels from the SWC1 and SWC2 pins are determined by the SWCn register bits (CR6-B4/CR13-
B4). This pin remains functional even in power-down mode with the PDN pin is a logic “0”.
DET1, DET2
The DETn pins are the SLIC’s detection signal (switch hook, ring trip or ground key detection) inputs. These
pins are used when the SLIC connected to the corresponding channel is an Intersil RSLICTM series device. A
logic “0” on this pin clears the corresponding DETn register bit (CR6-B1/CR13-B1). A logic ‘1’ on this pin
input sets the register bit.
The Intersil RSLICTM series SLIC device is equipped with a function to switch the output on its DET pin from a
logic “1” state to a logic “0” state when it detects an assigned event of either off-hook, ring trip or ground key.
Therefore, by connecting these pins to the corresponding pins on the SLIC device and reading the DETn register
bit (CR6-B1/CR13-B1), the occurrence of an assigned event can be detected.
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