Philips Semiconductors
Product specification
Economy Autosync Deflection Controller
(EASDC)
TDA4858
SYMBOL
tclamp(max)
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
0.15
UNIT
µs
maximum duration of video
clamping pulse after end of
horizontal sync
VCLBL = 3 V; VCLSEL > 7 V
−
−
−
−
V
CLBL = 3 V; VCLSEL < 5 V
1.0
µs
ICLSEL
input current
VCLSEL < 5 V
VCLSEL > 7 V
−
−
−
−
−20
±3
µA
µA
PLL1 phase comparator and frequency-locked loop [HPLL1 (pin 26) and HBUF (pin 27)]
tHSYNC(max)
maximum width of horizontal
sync pulse (referenced to line
period)
fH < 45 kHz
fH > 45 kHz
−
−
−
−
20
25
%
%
tlock(HPLL1)
VHPLL1
total lock-in time of PLL1
control voltage
−
40
80
ms
notes 2 and 3
fH(min); note 4
VHBUF
buffered f/v voltage at HBUF
(pin 27)
−
−
−
5.6
2.5
−
−
V
fH(max); note 4
−
V
Iload(HBUF)
maximum load current
−4.0
mA
ADJUSTMENT OF HORIZONTAL PICTURE POSITION
∆HPOS
horizontal shift adjustment
range (referenced to horizontal
period)
IHSHIFT = 0
HSHIFT = −135 µA
−
−
−10.5
−
−
%
%
I
+10.5
IHPOS
input current
∆HPOS = +10.5%
∆HPOS = −10.5%
note 5
−110
−120
0
−135
−
µA
µA
V
−
−
0
Vref(HPOS)
Voff(HPOS)
reference voltage at input
5.1
−
−
picture shift is centred if HPOS
(pin 30) is forced to ground
0.1
V
Horizontal oscillator [HCAP (pin 29) and HREF (pin 28)]
fH(0)
∆fH(0)
TC
free-running frequency without RHBUF = ∞;
30.53
−
31.45
32.39
±3.0
kHz
%
PLL1 action (for testing only)
RHREF = 2.4 kΩ;
CHCAP = 10 nF; note 3
spread of free-running
frequency (excluding spread of
external components)
−
temperature coefficient of
free-running frequency
−100
0
+100
10−6/K
fH(max)
VHREF
maximum oscillator frequency
−
−
130
kHz
V
voltage at input for reference
current
2.43
2.55
2.68
1997 Oct 27
15
NXP [ NXP ]
