NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Symbol
Parameter
Min
Typ
Max
Unit
[2]
VSNVSCROSS
Output voltage during crossover
VSNVSVOLT[2:0] = 110
VCOIN > 2.9 V
V
2.7
—
—
Switch to LDO: VIN > 2.825 V, ISNVS
100 µA
=
LDO to Switch: VIN < 3.05 V, ISNVS = 100 µA
VSNVS AC and transient
[3] [4]
tONSNVS
VSNVSOSH
VSNVSLITR
Turn on time (load capacitor, 0.47 µF)
ms
mV
mV
VIN > UVDET to 90 % of VSNVS
VCOIN = 0.0 V, ISNVS = 5.0 µA
VSNVSVOLT[2:0] = 000 to 110
—
—
—
24
70
Startup overshoot
VSNVSVOLT[2:0] = 000 to 110
ISNVS = 5.0 µA
dVIN/dt = 50 mV/µs
40
Transient line response ISNVS = 75 % of ISNVS
MAX
—
—
32
22
—
—
3.2 V < VIN < 4.5 V, VSNVSVOLT[2:0] = 110
2.45 V < VIN < 4.5 V, VSNVSVOLT[2:0] =
[000] - [101]
VSNVSLOTR
Transient load response
VSNVSVOLT[2:0] = 110
3.1 V (UVDETL) < VIN ≤ 4.5 V
ISNVS = 75 to 750 µA
2.8
—
—
—
V
VSNVSVOLT[2:0] = 000 to 101
2.45 V < VIN ≤ 4.5 V
1.0
2.0
%
VTL0 > VIN, 1.8 V ≤ VCOIN ≤ 3.3 V
ISNVS = 40 µA to ISNVS MAX
Refer to Figure 30
VSNVS DC, switch
VINSNVS Operating input voltage
V
Valid coin cell range
1.8
—
3.3
ISNVS
Operating load current
TA = 0 °C to 85 °C
µA
1500
1800
1000
—
—
TA = −40 °C to 105 °C
RDSONSNVS
Internal switch RDS(on)
VCOIN = 2.6 V
Ω
V
V
—
—
100
3.00
3.1
[2]
VTL1
VIN threshold (VIN powered to coin cell powered)
VSNVSVOLT[2:0] = 110
2.725
2.775
2.90
2.95
VTH1
VIN threshold (coin cell powered to VIN powered)
VSNVSVOLT[2:0] = 110
[1] For 1.8 V ISNVS limited to 100 µA for VCOIN < 2.1 V
[2] During crossover from VIN to LICELL, the VSNVS output voltage may drop to 2.7 V before going to the LICELL voltage. This momentary drop does not
cause any malfunction. The i.MX RTC continues to operate through the transition, and as a worst case it may switch to the internal RC oscillator for a few
clock cycles before switching back to the external crystal oscillator.
[3] The start-up of VSNVS is not monotonic. It first rises to 1.0 V and then settles to its programmed value within the specified tr1 time.
[4] From coin cell insertion to VSNVS =1.0 V, the delay time is typically 400 ms.
PF4210
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
103 / 137
NXP [ NXP ]
