LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
11.16 DMIC subsystem
Table 43. Dynamic characteristics[1]
Tamb = 40 C to 105 C; VDD = 2.7 V to 3.6 V; CL = 30 pF balanced loading on all pins; Input slew = 1 ns, SLEW set to
standard mode for all pins; Bypass bit = 0; Parameters sampled at the 90 % and 10 % level of the rising or falling edge.
Symbol Parameter
Conditions
Min
14.3
14.3
0
Typ
Max
Unit
ns
tDS
data set-up time CCLK 100 MHz
-
-
-
-
-
-
-
-
CCLK > 100 MHz
ns
tDH
data hold time
CCLK 100 MHz
ns
CCLK > 100 MHz
0
ns
[1] Based on simulated values.
CLOCK
t
DH
t
SU
DATA
aaa-017025
Fig 35. DMIC timing diagram
11.17 Smart card interface
Table 44. Dynamic characteristics[1]
Tamb = 40 C to 105 C; VDD = 1.71 V to 3.6 V; CL = 30 pF balanced loading on all pins; Input slew = 1 ns, SLEW setting =
standard mode for all pins; Parameters sampled at the 90 % and 10 % level of the rising or falling edge.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
2.7 V VDD 3.6 V
tDS
data set-up time
CCLK 100 MHz
CCLK > 100 MHz
CCLK 100 MHz
CCLK > 100 MHz
2.1
2.1
0
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
-
tDH
data hold time
-
0
-
tv(Q)
data output valid time CCLK 100 MHz
11.0
11.0
22.5
22.5
CCLK > 100 MHz
[1] Based on simulated values. VDD = 2.7 V - 3.6 V.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
130 of 168
NXP [ NXP ]
