欢迎访问ic37.com |
会员登录 免费注册
发布采购

LPC3240FET296 参数 Datasheet PDF下载

LPC3240FET296图片预览
型号: LPC3240FET296
PDF下载: 下载PDF文件 查看货源
内容描述: 16位/ 32位ARM微控制器;硬件浮点协处理器, USB的On-the - Go,然后EMC存储器接口 [16/32-bit ARM microcontrollers; hardware floating-point coprocessor, USB On-The-Go, and EMC memory interface]
分类和应用: 存储微控制器和处理器外围集成电路时钟
文件页数/大小: 73 页 / 350 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
 浏览型号LPC3240FET296的Datasheet PDF文件第8页浏览型号LPC3240FET296的Datasheet PDF文件第9页浏览型号LPC3240FET296的Datasheet PDF文件第10页浏览型号LPC3240FET296的Datasheet PDF文件第11页浏览型号LPC3240FET296的Datasheet PDF文件第13页浏览型号LPC3240FET296的Datasheet PDF文件第14页浏览型号LPC3240FET296的Datasheet PDF文件第15页浏览型号LPC3240FET296的Datasheet PDF文件第16页  
NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
Table 4.
Symbol
EMC_WR
Pin description
…continued
Pin
R4
D2
E3
F3
H2
H3
F1
E1
H4
G2
G3
E2
C1
D1
F2
C16
C15
C14
Power supply
domain
VDD_EMC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOC
VDD_IOD
VDD_IOD
VDD_IOD
Type
O
O
O
O
I/O: BK
I/O: BK
I/O: BK
I/O: BK
I/O: BK
I/O: BK
I/O: BK
I/O: BK
O
I
O
I
I
I
I
I
I
I
F4
E13
N16
C7
VDD_IOC
VDD_IOD
VDD_IOA
VDD_IOB
I
I
I
I
I
I
I
I
D13
VDD_IOD
I
I
I
B16
VDD_IOD
I
I
I
I
E12
VDD_IOD
I
I
I
Description
EMC write strobe, active LOW
Flash address latch enable
Flash chip enable
Flash command latch enable
Flash data bus, bit 0
Flash data bus, bit 1
Flash data bus, bit 2
Flash data bus, bit 3
Flash data bus, bit 4
Flash data bus, bit 5
Flash data bus, bit 6
Flash data bus, bit 7
Flash read enable
Flash ready (from flash device)
Flash write enable
General purpose input 0
I
2
S1 Receive data
General purpose input 1
Boot select input
General purpose input 2
Timer 2 capture input 0
Ethernet receive data 3
General purpose input 3
General purpose input 4
SPI1 busy input
General purpose input 5
UART 3 data carrier detect input
General purpose input 6
High-speed timer capture input
Ethernet receive data 2
General purpose input 7
Timer 4 capture input 0
Motor control PWM LOW-active fast abort input
General purpose input 8
Keyscan column 6 input
SPI2 busy input
Ethernet receive data valid input
General purpose input 9
Keyscan column 7 input
Ethernet collision input
© NXP B.V. 2009. All rights reserved.
FLASH_ALE
FLASH_CE
FLASH_CLE
FLASH_IO[0]
FLASH_IO[1]
FLASH_IO[2]
FLASH_IO[3]
FLASH_IO[4]
FLASH_IO[5]
FLASH_IO[6]
FLASH_IO[7]
FLASH_RD
FLASH_RDY
FLASH_WR
GPI_0/I2S1RX_SDA
GPI_1/SERVICE
GPI_2/CAP2[0]/
ENET_RXD3
GPI_3
GPI_4/SPI1_BUSY
GPI_5/U3_DCD
GPI_6/
HSTIM_CAP/
ENET_RXD2
GPI_7/CAP4[0]/
MCABORT
GPI_8/KEY_COL6/
SPI2_BUSY/
ENET_RX_DV
GPI_9/KEY_COL7/
ENET_COL
LPC3220_30_40_50_1
Preliminary data sheet
Rev. 01 — 6 February 2009
12 of 73