LPC3220/30/40/50
NXP Semiconductors
16/32-bit ARM microcontrollers
Table 4.
Symbol
Pin description …continued
Pin
Power supply
domain
Type
Description
JTAG_NTRST
JTAG_RTCK
JTAG_TCK
JTAG_TDI
H17
H18
H14
J16
J15
G18
F15
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
I: PU
JTAG1 reset input
O
JTAG1 return clock out
JTAG1 clock input
I
I: PU
JTAG1 data input
JTAG_TDO
JTAG_TMS
O
JTAG1 data out
I: PU
TAG1 test mode select input
Keyscan column 0 input
Ethernet transmit clock
Keyscan column 1 input,
Ethernet receive clock (MII mode)
Ethernet reference clock (RMII mode)
Keyscan column 2 input
Ethernet receive error input
Keyscan column 3 input
Ethernet carrier sense input
Keyscan column 4 input
Ethernet receive data 0
Keyscan column 5 input
Ethernet receive data 1
Keyscan row 0 out
KEY_COL0/
ENET_TX_CLK
I
I
KEY_COL1/
ENET_RX_CLK/
ENET_REF_CLK
E16
VDD_IOD
I
I
I
KEY_COL2/
ENET_RX_ER
D17
D18
G15
F16
E15
E14
F14
D16
C17
C18
A6
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
VDD_IOD
I
I
KEY_COL3/
ENET_CRS
I
I
KEY_COL4/
ENET_RXD0
I
I
KEY_COL5/
ENET_RXD1
I
I
KEY_ROW0/
ENET_TX_ER
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O T
I/O: P
O
Ethernet transmit error
Keyscan row 1 out
KEY_ROW1/
ENET_TXD2
Ethernet transmit data 2
Keyscan row 2 out
KEY_ROW2/
ENET_TXD3
Ethernet transmit data 3
Keyscan row 3 out
KEY_ROW3/
ENET_TX_EN
Ethernet transmit enable
Keyscan row 4 out
KEY_ROW4/
ENET_TXD0
Ethernet transmit data 0
Keyscan row 5 out
KEY_ROW5/
ENET_TXD1
Ethernet transmit data 1
MS/SD card command out
Timer 2 match output 1
MS/SD card data 0
MS_BS/MAT2[1]
MS_DIO0/MAT0[0]
A8
I/O: P
O
Timer 0 match output 0
MS/SD card data 1
MS_DIO1/
MAT0[1]
A7
I/O: P
O
Timer 0 match output 1
MS/SD card data 2
MS_DIO2/
MAT0[2]
B8
I/O: P
O
Timer 0 match output 2
LPC3220_30_40_50_1
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 01 — 6 February 2009
15 of 73
NXP [ NXP ]
