LPC3220/30/40/50
NXP Semiconductors
16/32-bit ARM microcontrollers
Table 4.
Symbol
Pin description …continued
Pin
Power supply
domain
Type
Description
MS_DIO3/
MAT0[3]
C8
VDD_IOD
VDD_IOD
-
I/O: P
MS/SD card data 3
Timer 0 match output 3
MS/SD card clock output
Timer 2 match output 0
not connected
O
I/O
O
-
MS_SCLK/
MAT2[0]
B7
n.c.
B17,
U17,
U2
ONSW
M15
B5
VDD_RTC
VDD_IOB
O
RTC match output for external power control
Port 0 GPIO bit 0
I2S1 receive clock
Port 0 GPIO bit 1
I2S1 receive word select
Port 0 GPIO bit 2
I2S0 receive data
LCD data bit 4
P0[0]/
I2S1RX_CLK
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P0[1]/
I2S1RX_WS
D7
VDD_IOB
VDD_IOA
P0[2]/
I2S0RX_SDA/
LCDVD[4]
M17
P0[3]/
I2S0RX_CLK/
LCDVD[5]
M18
L15
L16
L17
L18
VDD_IOA
VDD_IOA
VDD_IOA
VDD_IOA
VDD_IOA
Port 0 GPIO bit 3
I2S0 receive clock
LCD data bit 5
P0[4]/
I2S0RX_WS/
LCDVD[6]
Port 0 GPIO bit 4
I2S0 receive word select
LCD data bit 6
P0[5]/
I2S0TX_SDA/
LCDVD[7]
Port 0 GPIO bit 5
I2S0 transmit data
LCD data bit 7
P0[6]/
I2S0TX_CLK/
LCDVD[12]
Port 0 GPIO bit 6
I2S0 transmit clock
LCD data bit 12
P0[7]/
I2S0TX_WS/
LCDVD[13]
Port 0 GPIO bit 7
I2S0 transmit word select
LCD data bit 13
PLL397_LOOP
R14
D14
VDD_AD
VDD_IOD
analog filter PLL397 loop filter
(for external components)
PWM_OUT1/
LCDVD[16]
O
PWM1 out
O
LCD data bit 16
PWM_OUT2/INTSTAT/
LCDVD[19]
D15
VDD_IOD
O
PWM2 output/internal interrupt status[1]
O
LCD data bit 19
RESET
M14
G4
VDD_RTC
VDD_IOC
VDD_RTC
VDD_RTC
I
Reset input, active LOW
Reset out. Reflects external and WDT reset
RTC oscillator input
RESOUT
RTCX_IN
RTCX_OUT
O
P16
P17
analog in
analog out RTC oscillator output
LPC3220_30_40_50_1
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 01 — 6 February 2009
16 of 73
NXP [ NXP ]
