NXP Semiconductors
HEF4017B
5-stage Johnson decade counter
Table 2.
Symbol
CP0
MR
V
DD
Pin description
…continued
Pin
14
15
16
Description
clock input (LOW-to-HIGH edge-triggered)
master reset input
supply voltage
7. Functional description
Table 3.
MR
H
L
L
L
L
L
L
[1]
Function table
CP0
X
H
↑
L
X
H
↓
CP1
X
↓
L
X
H
↑
L
Operation
Q0 = Q5-9 = H; Q1 to Q9 = L
counter advances
counter advances
no change
no change
no change
no change
H = HIGH voltage level; L = LOW voltage level; X = don’t care;
↑
= positive-going transition;
↓
= negative-going transition.
HEF4017B_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 9 December 2008
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