NXP Semiconductors
HEF4017B
5-stage Johnson decade counter
Table 8.
Dynamic power dissipation P
D
P
D
can be calculated from the formulas shown. V
SS
= 0 V; t
r
= t
f
≤
20 ns; T
amb
= 25
°
C.
Symbol
P
D
Parameter
dynamic power
dissipation
V
DD
5V
10 V
15 V
Typical formula for P
D
(µW)
P
D
= 500
×
f
i
+
Σ(f
o
×
C
L
)
×
V
DD2
P
D
= 2200
×
f
i
+
Σ(f
o
×
C
L
)
×
V
DD2
P
D
= 6000
×
f
i
+
Σ(f
o
×
C
L
)
×
V
DD2
where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
DD
= supply voltage in V;
Σ(C
L
×
f
o
) = sum of the outputs.
12. Waveforms
V
I
CP0 input
V
SS
V
I
CP1 input
V
SS
t
PHL
V
OH
Q1 - Q9
output
V
OL
t
PLH
V
OH
Q0, Q5 - Q9
output
V
OL
V
M
t
TLH
t
THL
001aaj305
t
PHL
V
M
t
PLH
V
M
V
M
Conditions: CP1 = LOW, while CP0 triggers on a LOW-to-HIGH transition. CP1 triggers on a HIGH-to-LOW transition;
The shaded areas indicate where the output state is set by the input count.
Measurement points given in
Fig 7.
Waveforms showing the propagation delays for CP0, CP1 to Qn, Q5-9 outputs and the output transition
times
HEF4017B_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 9 December 2008
9 of 16
PHILIPS [ NXP SEMICONDUCTORS ]
