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FXPS7115DS4 参数 Datasheet PDF下载

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型号: FXPS7115DS4
PDF下载: 下载PDF文件 查看货源
内容描述: [Digital absolute pressure sensor, 40 kPa to 115 kPa]
分类和应用: 传感器换能器
文件页数/大小: 72 页 / 1041 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
FXPS7115D4  
Digital absolute pressure sensor, 40 kPa to 115 kPa  
Table 98.ꢀLock and CRC Register bit definitions  
Location  
Bit  
Address  
$5F  
Register  
7
6
0
0
5
4
0
0
3
2
1
0
CRC_UF2  
LOCK_UF2  
0
CRC_UF2[3:0]  
Factory Default  
$AF  
0
0
0
0
0
0
CRC_F_A  
CRC_F_B  
CRC_F_C  
CRC_F_D  
CRC_F_E  
CRC_F_F  
LOCK_F_A  
REGA_BLOCKID[2:0]  
CRC_F_A[3:0]  
varies  
Factory Default  
$BF  
1
0
0
0
1
0
0
0
1
0
1
1
0
0
LOCK_F_B  
REGB_BLOCKID[2:0]  
CRC_F_B[3:0]  
varies  
Factory Default  
$CF  
1
1
LOCK_F_C  
REGC_BLOCKID[2:0]  
CRC_F_C[3:0]  
varies  
Factory Default  
$DF  
1
1
LOCK_F_D  
REGD_BLOCKID[2:0]  
CRC_F_D[3:0]  
varies  
Factory Default  
$EF  
1
0
LOCK_F_E  
REGE_BLOCKID[2:0]  
CRC_F_E[3:0]  
Factory Default  
$FF  
0
0
0
0
0
0
0
0
0
0
LOCK_F_F  
0
REGF_BLOCKID[2:0]  
0
CRC_F_F[3:0]  
Factory Default  
7.7.33 Reserved registers  
A register read command to a reserved register or a register with reserved bits results in  
a valid response. The data for reserved bits may be '0' or '1'.  
A register write command to a reserved register or a register with reserved bits executes  
and results in a valid response. The data for the reserved bits may be '0' or '1'. A write to  
the reserved bits must always be '0' for normal device operation and performance.  
7.7.34 Invalid register addresses  
A register read command to a register address outside of the addresses listed in  
Section 7.6 "User-accessible data array" results in a valid response. The data for the  
registers will be '00h'.  
A register write command to a register address outside of the addresses listed in  
Section 7.6 "User-accessible data array" will not execute, but results in a valid response.  
The data for the registers will be '00h'.  
A register write command to a read-only register will not execute, but results in a valid  
response. The data for the registers is the current content of the registers.  
7.8 Read/write register array CRC verification  
The writable registers (all registers with the exception of the DEVLOCK_WR register) are  
verified by a continuous 4-bit CRC that is calculated on the entire array once ENDINIT is  
set. The CRC verification uses a generator polynomial of g(x) = X4 + X3 + 1, with a seed  
value = '0000'.  
FXPS7115D4  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 3 — 5 December 2019  
53 / 72  
 
 
 
 
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