NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
• Overflow, half-carry, negative, zero, and carry condition codes support conditional
branching on the results of signed, unsigned, and binary-coded decimal (BCD)
operations
• Efficient bit manipulation instructions
• Fast 8-bit by 8-bit multiply and 16-bit by 8-bit divide instructions
• STOP and WAIT instructions to invoke low-power operating modes
10.3 Programmer’s model and CPU registers
Figure 16 shows the five CPU registers. CPU registers are not part of the memory map.
accumulator
A
16-bit index register H:X
index register (high)
index register (low)
H
X
stack pointer
SP
program counter pointer
PC
condition code register
V
1
1
H
I
N
Z
C
CCR
Carry
Zero
Negative
Interrupt mask
Half-carry (from bit 3)
Two's complement overflow
aaa-028004
Figure 16.ꢀCPU registers
10.3.1 Accumulator (A)
The A accumulator is a general-purpose 8-bit register. One operand input to the
arithmetic logic unit (ALU) is connected to the accumulator and the ALU results are often
stored into the A accumulator after arithmetic and logical operations. The accumulator
can be loaded from memory using various addressing modes to specify the address
where the loaded data comes from, or the contents of A can be stored to memory using
various addressing modes to specify the address where data from A will be stored.
Reset has no effect on the contents of the A accumulator.
10.3.2 Index register (H:X)
This 16-bit register is actually two separate 8-bit registers (H and X), which often work
together as a 16-bit address pointer where H holds the upper byte of an address and X
holds the lower byte of the address. All indexed addressing mode instructions use the
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
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