NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
These registers are accessed with dedicated serial BDC commands and are not located
in the memory space of the target MCU (so they do not have addresses and cannot be
accessed by user programs).
Some of the bits in the BDCSCR have write limitations; otherwise, these registers may be
read or written at any time. For example, the ENBDM control bit may not be written while
the MCU is in ACTIVE BACKGROUND mode. (This prevents the ambiguous condition
of the control bit forbidding ACTIVE BACKGROUND mode while the MCU is already in
ACTIVE BACKGROUND mode.) Also, the four status bits (BDMACT, WS, WSF, and
DVF) are read-only status indicators and can never be written by the WRITE_CONTROL
serial BDC command. The clock switch (CLKSW) control bit may be read or written at
any time.
17.3.2 BDC status and control register (BDCSCR)
This register can be read or written by serial BDC commands (READ_STATUS and
WRITE_CONTROL) but is not accessible to user programs because it is not located in
the normal memory map of the MCU.
Table 166.ꢀBDC status and control register (BDCSCR)
Bit
7
6
5
4
3
2
1
0
R
W
BDMACT
WS
WSF
DVF
ENBDM
BKPTEN
FTS
CLKSW
Normal Reset
Reset in Active BDM
0
1
0
1
0
0
0
0
0
1
0
0
0
0
0
0
= Reserved
Table 167.ꢀBDCSCR register field descriptions
Field
Description
Enable BDM (Permit ACTIVE BACKGROUND Mode) — Typically, this bit is written to 1 by the debug host
shortly after the beginning of a debug session or whenever the debug host resets the target and remains 1
until a normal reset clears it.
7
ENBDM
0ꢀBDM cannot be made active (non-intrusive commands still allowed)
1ꢀBDM can be made active to allow ACTIVE BACKGROUND mode commands
BACKGROUND Mode Active Status — This is a read-only status bit.
0ꢀBDM not active (user application program running)
1ꢀBDM active and waiting for serial commands
6
BDMACT
BDC Breakpoint Enable — If this bit is clear, the BDC breakpoint is disabled and the FTS (force tag select)
control bit and BDCBKPT match register are ignored.
5
0ꢀBDC breakpoint disabled
1ꢀBDC breakpoint enabled
BKPTEN
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
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