Numonyx™ StrataFlash® Cellular Memory (M18)
Table 29: Status Register Bit Definitions (Sheet 2 of 2)
Status Register (SR) Bits
Default Value = 0080h
Program
/Erase
Voltage
Error
Region
Reserved Program
Status
Erase
Suspend
Status
Program
Suspend
Status
Block-
Partition
Locked
Status
Error
Ready
Status
Erase
Error
Program
Error
15-10
9-8
7
6
5
4
3
2
1
0
Bit
2
Name
Description
0
1
=
=
Program suspend not in effect.
Program suspend in effect.
Program Suspend Status
Block-Locked Error
0
1
=
=
Block NOT locked during program or erase - operation successful.
Block locked during program or erase - operation aborted.
1
SR7 SR0
0
0
1
1
0
1
0
1
=
=
=
=
Active program or erase operation in addressed partition.
BEFP: Program or Verify complete, or Ready for data.
Active program or erase operation in other partition.
BEFP: Program or Verify in progress.
No active program or erase operation in any partition.
BEFP: Operation complete
0
Partition Status
Reserved.
9.1.1
Clearing the Status Register
The Status Register (SR) contain status and error bits which are set by the device. SR
status bits are cleared by the device; however, SR error bits are cleared by issuing the
Clear Status Register command. Resetting the device also clears the Status Register.
Table 30: Clear Status Register Command Bus Cycles
Setup Write Cycle
Command
Confirm Write Cycle
Address Bus Data Bus
Address Bus
Data Bus
Clear Status Register
Device Address
0050h
---
---
Depending on the current state of the partition, issuing the Clear Status Command will
place the addressed partition in Read Status mode. Please see 'Next State' Table for
further details. Other partitions are not affected.
Note:
Care should be taken to avoid Status Register ambiguity. If a command sequence error
occurs while in an Erase Suspend condition, the Status Register will indicate a
Command Sequence error by setting SR4 and SR5. When the erase operation is
resumed (and finishes), any errors that may have occurred during the erase operation
will be masked by the Command Sequence error. To avoid this situation, clear the
Status Register prior to resuming a suspended erase operation.
The Clear Status Register command functions independent of the voltage level on VPP.
9.2
Read Configuration Register
The Read Configuration Register (RCR) is a 16-bit read/write register used to select
bus-read modes, and to configure synchronous-burst read characteristics of the flash
device. All Read Configuration Register bits are set and cleared using the Program Read
Configuration Register command.
April 2008
309823-10
Datasheet
77