®
Numonyx™ StrataFlash Embedded Memory (J3-65nm)
3.2
56-Lead TSOP Package Pinout, 256-Mbit
Figure 5: 56-Lead TSOP Package Pinout (256 Mbit)
A24
A22
CE1
A21
A20
A19
A18
A17
A16
VCC
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
WE#
OE#
STS
DQ15
DQ7
2
3
4
5
6
DQ14
DQ6
7
8
(1)
GND
9
DQ13
DQ5
DQ12
DQ4
VCCQ
GND
DQ11
DQ3
DQ10
DQ2
VCC
A15
A14
A13
A12
CE0
VPEN
RP#
A11
A10
A9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56-Lead TSOP
Standard Pinout
14 mm x 20 mm
Top View
A8
DQ9
DQ1
DQ8
DQ0
A0
GND
A7
A6
A5
A4
BYTE
A23
A3
A2
CE2
A1
Notes:
1.
No internal connection on Pin 9; it may be driven or floated. For legacy designs, pin can be tied to Vcc.
December 2008
319942-02
Datasheet
13
NUMONYX [ NUMONYX B.V ]
