22.0 Instruction Set (Continued)
22.4.9 No-Operation Instruction
Registers
Lower 8 Bits of PC
PL
C
1 Bit of PSW Register for Carry
1 Bit of PSW Register for Half Carry
1 Bit of PSW Register for Global Interrupt
Enable
The no-operation instruction does nothing, except to occupy
space in the program memory and time in execution.
HC
GIE
No-Operation (NOP)
Note: The VIS is a special case of the Indirect Transfer of
Control addressing mode, where the double byte vector
associated with the interrupt is transferred from adjacent
addresses in the program memory into the program counter
(PC) in order to jump to the associated interrupt service
routine.
VU
VL
Interrupt Vector Upper Byte
Interrupt Vector Lower Byte
Symbols
[B]
Memory Indirectly Addressed by B Register
Memory Indirectly Addressed by X Register
Direct Addressed Memory
Direct Addressed Memory or [B]
Direct Addressed Memory or [B] or
Immediate Data
[X]
22.5 REGISTER AND SYMBOL DEFINITION
The following abbreviations represent the nomenclature
used in the instruction description and the COP8 cross-
assembler.
MD
Mem
Meml
Registers
A
8-Bit Accumulator Register
8-Bit Address Register
Imm
Reg
8-Bit Immediate Data
B
Register Memory: Addresses F0 to FF
(Includes B, X and SP)
X
8-Bit Address Register
S
8-Bit Segment Register
8-Bit Stack Pointer Register
15-Bit Program Counter Register
Upper 7 Bits of PC
Bit
←
↔
Bit Number (0 to 7)
SP
PC
PU
Loaded with
Exchanged with
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