Nexperia
PSMN0R9-25YLD
N-channel 25 V, 0.85 mΩ, 300 A logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
aaa-022474
4
10
V
C
(pF)
DS
C
C
iss
I
D
oss
3
2
10
V
V
GS(pl)
C
rss
GS(th)
V
GS
Q
GS2
10
Q
GS1
Q
GS
Q
GD
Q
G(tot)
003aaa508
10
10
Fig. 13. Gate charge waveform definitions
-1
2
1
10
10
V
DS
(V)
VGS = 0 V; f = 1 MHz
Fig. 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aal160
aaa-022475
3
2
10
I
S
I
D
(A)
(A)
10
t
rr
t
t
b
a
0
10
0.25 I
RM
1
175°C
0.2
T = 25°C
j
I
RM
-1
10
t (s)
0
0.4
0.6
0.8
1
(V)
1.2
V
SD
Fig. 16. Reverse recovery timing definition
VGS = 0 V
Fig. 15. Source-drain (diode forward) current as a
function of source-drain (diode forward)
voltage; typical values
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PSMN0R9-25YLD
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
27 April 2016
9 / 13
NEXPERIA [ Nexperia ]
