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UPD703208GKA-XXX-9EU 参数 Datasheet PDF下载

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型号: UPD703208GKA-XXX-9EU
PDF下载: 下载PDF文件 查看货源
内容描述: 32位单芯片微控制器产品 [32-Bit Single-Chip Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 757 页 / 4297 K
品牌: NEC [ NEC ]
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CHAPTER 3 CPU FUNCTIONS  
3.2.1 Program register set  
The program register set includes general-purpose registers and a program counter.  
(1) General-purpose registers (r0 to r31)  
Thirty-two general-purpose registers, r0 to r31, are available. All of these registers can be used as a data  
variable or address variable.  
However, r0 and r30 are implicitly used by instructions and care must be exercised when using these  
registers. r0 always holds 0 and is used for operations that use 0 and offset 0 addressing. r30 is used as a  
base pointer when performing memory access with the SLD and SST instructions.  
Also, r1, r3 to r5, and r31 are implicitly used by the assembler and C compiler. Therefore, before using these  
registers, their contents must be saved so that they are not lost, and they must be restored to the registers  
after the registers have been used. There are cases when r2 is used by the real-time OS. If r2 is not used by  
the real-time OS, r2 can be used as a variable register.  
Table 3-1. Program Registers  
Name  
Usage  
Zero register  
Assembler-reserved register  
Address/data variable register (when r2 is not used by the real-time OS to be used)  
Operation  
r0  
r1  
r2  
r3  
r4  
r5  
Always holds 0  
Working register for generating 32-bit immediate  
Stack pointer  
Used to generate stack frame when function is called  
Used to access global variable in data area  
Global pointer  
Text pointer  
Register to indicate the start of the text area (area for placing program code)  
r6 to r29  
r30  
Address/data variable register  
Element pointer  
Link pointer  
Base pointer when memory is accessed  
Used by compiler when calling function  
r31  
PC  
Program counter  
Holds instruction address during program execution  
(2) Program counter (PC)  
This register holds the address of the instruction under execution. The lower 26 bits of this register are valid,  
and bits 31 to 26 are fixed to 0. If a carry occurs from bit 25 to bit 26, it is ignored.  
Bit 0 is fixed to 0, and branching to an odd address cannot be performed.  
31  
2625  
1 0  
0
After reset  
00000000H  
PC  
Fixed to 0  
Instruction address under execution  
Users Manual U15862EJ3V0UD  
100  
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