µPD703100A-33, 703100A-40, 703101A-33, 703102A-33
Table 15-3. Symbols Used in Operation
Symbol
Description
←
Input for
GR [ ]
General register
SR [ ]
System register
zero-extend (n)
sign-extend (n)
Extend n with zeros until word length
Extend n with signs until word length
Read data of size b from address a
Write data b of address a by size c
Read bit b of address a
load-memory (a, b)
store-memory (a, b, c)
load-memory-bit (a, b)
store-memory-bit (a, b, c)
saturated (n)
Write c to bit b of address a
Execute saturation processing of n (n is a two’s complement)
If, as a result of the calculation,
n ≥ 7FFFFFFFH, let it be 7FFFFFFFH.
n ≤ 80000000H, let it be 80000000H
result
Reflect the result in a flag
Byte (8 bits)
Byte
Half-word
Half word (16 bits)
Word (32 bits)
Add
Word
+
−
Subtract
||
Bit concatenation
Multiply
×
÷
Divide
%
Remainder of division result
Logical AND
AND
OR
Logical OR
XOR
Exclusive OR
Logical NOT
NOT
logically shift left by
logically shift right by
arithmetically shift right by
Logical shift left
Logical shift right
Arithmetic shift right
Table 15-4. Symbols Used for Execution Clock
Symbol
Description
i : issue
When executing another instruction immediately after executing an instruction
When repeating the same instruction immediately after executing the instruction
When referring to instruction execution results in the next instruction
r : repeat
l : latency
58
Preliminary Data Sheet U14168EJ2V0DS00
NEC [ NEC ]
