µPD31172
(c) During ECP normal-direction transfer
Parameter
CD (7:0), AUTOFEED# setup time
BUSY response time (from STROBE# ↓)
STROBE# response time
Symbol
t10
Conditions
MIN.
1 T
0
MAX.
2 T
Unit
ns
ns
ns
ns
ns
ns
t11
t12
2 T
0
4 T
BUSY response time (from STROBE# ↑)
t13
CD (7:0) hold time
t14
2 T
3 T
4 T
6 T
STROBE# setup timeNote
t15
Note When the FIFO buffer is empty, this signal is held at a high level.
Remark T: Parallel interface internal clock cycle (41.6 ns (MIN.))
CD (7:0)
AUTOFEED#
(output)
Valid data
t
10
STROBE#
(output)
t
14
t
11
t
12
t
13
t
15
BUSY
(input)
(d) During ECP reverse-direction transfer
Parameter
CD (7:0), BUSY setup time
AUTOFEED# response timeNote (from ACK# ↓)
ACK# response time
Symbol
t16
Conditions
MIN.
0
MAX.
Unit
ns
ns
ns
ns
ns
ns
t17
3 T
0
t18
AUTOFEED# response time (from ACK# ↑)
CD (7:0) hold time
t19
5 T
t20
0
0
ACK# setup time
t21
Note When the FIFO buffer is full, this signal is held at a low level.
Remark T: Parallel interface internal clock cycle (41.6 ns (MIN.))
CD (7:0)
Valid data
BUSY (input)
t
16
ACK# (input)
t
20
t
17
t
18
t
19
t
21
AUTOFEED#
(output)
31
Data Sheet U14388EJ2V0DS00
NEC [ NEC ]
