µPD31172
(10) IEEE1284-compliant parallel interface parameters
(a) Parallel port control signal output
Parameter
Symbol
Conditions
MIN.
MAX.
24
Unit
MHz
ns
Parallel interface internal clock frequency
CD (7:0) output delay time (writing to DATA register)
INIT#, STROBE#, AUTOFEED#, SELECTIN# setup time
DIR1284 setup time
tCLK1284
t1
t2
t3
30
4 T
5 T
ns
ns
Remark T: Parallel interface internal clock cycle (41.6 ns (MIN.))
IOW# (input)
t
1
CD (7:0)
(I/O)
t
2
3
INIT#, STROBE#,
AUTOFEED#,
SELECTIN#
(I/O)
t
DIR1284
(output)
(b) Compatible mode using FIFO
Parameter
CD (7:0) setup time
Symbol
Conditions
MIN.
24 T
24 T
MAX.
12 T
Unit
ns
ns
ns
ns
ns
ns
t4
t5
t6
t7
t8
t9
STROBE# pulse widthNote 1
BUSY response time
CD (7:0) hold timeNote 2 (from STROBE# ↑)
CD (7:0) hold timeNote 2 (from BUSY ↓)
STROBE# setup timeNote 3
24 T
0
24 T
Notes 1. When there is no reaction from BUSY at a low level, STROBE# continues to output a low level.
2. Data is held while BUSY is high level.
3. When the FIFO buffer is empty, this signal is held at a high level.
Remark T: Parallel interface internal clock cycle (41.6 ns (MIN.))
CD (7:0)
(output)
Valid data
t
4
t
5
t
7
STROBE#
(output)
t
8
t
6
t
9
BUSY
(input)
30
Data Sheet U14388EJ2V0DS00
NEC [ NEC ]
