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NT5CB512M8DP-EKB 参数 Datasheet PDF下载

NT5CB512M8DP-EKB图片预览
型号: NT5CB512M8DP-EKB
PDF下载: 下载PDF文件 查看货源
内容描述: [Commercial, Industrial and Automotive DDR3(L) 4Gb SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 163 页 / 4365 K
品牌: NANYA [ Nanya Technology Corporation. ]
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DDR3(L) 4Gb SDRAM  
NT5CB(C)512M8DN / NT5CB(C)256M16DP  
DLL Enable/Disable  
The DLL must be enabled for normal operation. DLL enable is required during power up initialization, and upon returning to  
normal operation after having the DLL disabled. During normal operation (DLL-on) with MR1 (A0=0), the DLL is  
automatically disabled when entering Self-Refresh operation and is automatically re-enable upon exit of Self-Refresh  
operation. Any time the DLL is enabled and subsequently reset, tDLLK clock cycles must occur before a Read or  
synchronous ODT command can be issued to allow time for the internal clock to be synchronized with the external clock.  
Failing to wait for synchronization to occur may result in a violation of the tDQSCK, tAON, or tAOF parameters. During  
tDLLK, CKE must continuously be registered high. DDR3(L) SDRAM does not require DLL for any Write operation, expect  
when RTT_WR is enabled and the DLL is required for proper ODT operation. For more detailed information on DLL Disable  
operation in DLL-off Mode.  
The direct ODT feature is not supported during DLL-off mode. The on-die termination resistors must be disabled by continu-  
ously registering the ODT pin low and/or by programming the RTT_Nom bits MR1{A9,A6,A2} to {0,0,0} via a mode register  
set command during DLL-off mode.  
The dynamic ODT feature is not supported at DLL-off mode. User must use MRS command to set Rtt_WR, MR2 {A10, A9}  
= {0, 0}, to disable Dynamic ODT externally.  
Output Driver Impedance Control  
The output driver impedance of the DDR3(L) SDRAM device is selected by MR1 (bit A1 and A5) as shown in MR1 definition  
figure.  
ODT Rtt Values  
DDR3(L) SDRAM is capable of providing two different termination values (Rtt_Nom and Rtt_WR). The nominal termination  
value Rtt_Nom is programmable in MR1. A separate value (Rtt_WR) may be programmable in MR2 to enable a unique Rtt  
value when ODT is enabled during writes. The Rtt_WR value can be applied during writes even when Rtt_Nom is disabled.  
Version 2.3  
02/2017  
22  
Nanya Technology Cooperation ©  
All Rights Reserved.  
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