MU9C1965A/L LANCAM MP
Full Flag Cascading
whether using the Control Register reset, or the /RESET
pin. When the device powers up, the memory and registers
are in an unknown state, so the /RESET pin must be asserted
to place the device in a known state.
The Full Flag daisy chain cascading is used for three
purposes: first, to allow instructions that address Next
Free locations to operate globally; second, to provide a
system wide Full flag; third, to allow the loading of the
Page Address registers during initialization using the SFF
instruction. The full flag logic causes only the device
containing the first empty location to respond to Next Free
instructions such as MOV NF,CR,V, which will move the
contents of the Comparand register to the first empty
location in a string of devices and set that location Valid,
so it will be available for the next automatic compare. With
devices connected as in Figure 1a on page 7, the /FF output
of the last device in a string provides a full indication for
the entire string.
Setting Page Address Register Values
In a vertically cascaded system, the user must set the
individual Page Address registers to unique values by
using the Page Address initialization mechanism. Each Page
Address register must contain a unique value to prevent
bus contention. This process allows individual device
selection. The Page Address register initialization works
as follows: Writes to Page Address registers are only active
for devices with /FI LOW and /FF HIGH. At initialization,
all devices are empty, thus the top device in the string will
respond to a TCO PA instruction, and load its PA register.
To advance to the next device in the string, a Set Full Flag
(SFF) instruction is used, which is also only active for the
device with /FI LOW and /FF HIGH. The SFF instruction
changes the first device’s /FF to LOW, although the device
really is empty, which allows the next device in the string to
respond to the TCO PA instruction and load its PA register.
The initialization proceeds through the chain in a similar
INITIALIZING THE LANCAM MP
Initialization of the LANCAM MP is required to configure
the various registers on the device. Since a Control register
reset establishes the operating conditions shown in Table
5 on page 10, restoration of operating conditions better
suited for the application may be required after a reset,
Cycle Type
Op-Code
Data Bus
Comments
Notes
DQ31–16 DQ15–0
Command Write
Command Write
Command Write
Command Write
TCO DS
TCO CT
TCO PA
SFF
Target Device Select register and disable local device selection
Target Control register and reset
0A28H
0A00H
0A08H
0700H
FFFFH
0000H
nnnnH
X
1
2
2
Target Page Address register and set page for cascaded operation
Set Full flag; allows access to next device (repeat previous cycle
plus this one for each device in chain)
•
•
Command Write
Command Write
Command Write
TCO CT
TCO CT
TCO SC
Target Control register and reset Full flags, but not Page address
Target Control register and give initial values
Target Segment counter and set destination to use upper 3 segments
(1–3) and source to only use lowest segment (0)
0A00H
0A00H
0A10H
0000H
8041H
3808H
3
4
Command Write
Set Persistent source to Memory at the Highest-Priority match
SPS M@HM
0005H
X
Notes:
1. Toggling the /RESET pin generates the same effect as this reset of the Control register, but good programming practice dictates
a software reset for initialization to account for all possible prior conditions.
2. This instruction may be omitted for a single LANCAM MP application. The last SFF will cause the /FF pin in the last chip in
a daisy chain to go LOW. In a daisy chain, DS needs to be set equal to PA to read out a particular chip prior to a match condition.
3. Typical LANCAM MP control environment: Enable match flag; Enable full flag; 96 CAM bits/32 RAM bits; Disable comparison
masking; Enable address increment; and enable Enhanced mode. This example translates to 8041H. See Table 9 on page 22 for
Control Register bit assignments.
4. Setting the persistent source to the Memory at Highest-Priority match allows a compare operation to be followed by a read of the
associated data when a match is found. Note that the persistent destination is set to the Comparand register by the reset.
Table 7: Example Initialization Routine
17
Rev. 1a
MUSIC [ MUSIC SEMICONDUCTORS ]
