Control State Descriptions
MU9C RCP Family
Table 3: Reset Conditions
Resource
Hardware Reset
All locations set Empty
00000000H
Software Reset
All locations set Empty
00000000H
Memory Array
Comparand Register
Mask Registers 1-7
Address Register
00000000H
00000000H
00000000H
00000000H
Instruction Register
Next Free Address Register
Device Select Register
00000000H
No Change
00000000H
00000000H
DS31-9
DS8
DS7-4
DS3-0
Reserved
SELEN
Reserved
Device Select
000000H
1 = Disabled
0000
000000H
1 = Disabled
0000
1111
No Change
Status Register
SR31
Reserved
0
0
SR30-28
SR27-26
SR25-24
SR23-20
SR19-16
SR15-13
SR12-0
Flags
Reserved
Active Address Type
Reserved
Page Address
Reserved
111 = No Match, Not Full
00
11 = Reset State
0000
1111
000
1111
00
11 = Reset State
0000
1111
000
Active Address
1111111111111 (SR12 is set to 0 on MU9C4K) 1111111111111 (SR12 is set to 0 on MU9C4K)
Configuration Register
FR31-29
FR28
Direct Write Mask Source
Reserved
000 = No Mask
0
No Change
0
FR27-26
FR25
FR24-4
Control Mode
LPC
Reserved
11 = Software Control Mode
1 = Not Low Priority CAM
000000H
No Change
No Change
No Change
No Change
FR3-0
Page Address
1111
Table 4: Configuration Register Bit Assignments
Bit(s)
Names
Description
31:29
Direct Write Mask Source
000 = No Mask
001 = Mask Register 1
010 = Mask Register 2
011 = Mask Register 3
100 = Mask Register 4
101 = Mask Register 5
110 = Mask Register 6
111 = Mask Register 7
28
Reserved
Set to 0
27:26
Control Mode
00 = Hardware Control Mode
01 = Reserved
10 = Reserved
11 = Software Control Mode. (If /AV = 1, access Status Register.)
25
LPC
0 = Low priority CAM
1 = Not low priority CAM
24:4
3:0
Reserved
Set to 0
Page Address PA3-0
Page Address value
Rev. 8.04
25
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