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MU9C8K64-90TDI 参数 Datasheet PDF下载

MU9C8K64-90TDI图片预览
型号: MU9C8K64-90TDI
PDF下载: 下载PDF文件 查看货源
内容描述: MU9C RCP家庭 [MU9C RCP Family]
分类和应用: 存储内存集成电路静态存储器双倍数据速率
文件页数/大小: 35 页 / 1040 K
品牌: MUSIC [ MUSIC SEMICONDUCTORS ]
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MU9C RCP Family  
Control State Descriptions  
Control State:  
Mnemonic:  
Binary Op-Code:  
Write at Next Free Address  
WRs[NFA]{MRnnn}  
XXX nnn 000 001  
Control State:  
Move Data from Memory to  
Comparand Register Indirect  
MOV CR,[AR]{MRnnn}  
XXX nnn 001 100  
Mnemonic:  
Binary Op-Code:  
/W: LOW /AV: HIGH PA:AA: NFA Scope: NFD  
Description: Writes data from the DQ31-0 bus to bits  
31-0 (DSC LOW) or 63-32 (DSC HIGH) of the next free  
location in the Memory array. In a vertically cascaded  
system, the write will take place in the device whose  
/FI=LOW and /FF=HIGH, and at the highest-priority  
location whose Validity bit is set HIGH. The validity of  
the location is set by the state of the /VB input, /VB =  
LOW: Valid, /VB = HIGH: Empty. The write is masked by  
bits 31-0 (DSC LOW) or 63-32 (DSC HIGH) of the  
contents of Mask Register nnn. When nnn=000 no mask is  
used; when masking is selected, only bits in the addressed  
location that correspond to LOW values in the selected  
mask register are updated.  
/W: HIGH /AV: HIGH PA:AA: aaa Scope: AS  
Description: Moves data from the memory address  
defined by the contents of the Address register to the  
Comparand register. The move is masked by the contents  
of Mask Register nnn. When nnn=000 no mask is used;  
when masking is selected, only bits in the addressed  
location that correspond to LOW values in the selected  
mask register are updated. Note that the /VB line is not  
driven during this operation. DSC must be LOW.  
Control State:  
Move Data from Comparand  
Register to Next Free Address  
MOV [NFA],CR{MRnnn}  
XXX nnn 001 101  
Mnemonic:  
Binary Op-Code:  
Control State:  
Read Highest-Priority  
Matching Location;  
Increment Match Address  
RDs[HPM]; NEXT  
/W: LOW /AV: HIGH PA:AA: NFA Scope: NFD  
Description: Moves data from the Comparand Register to  
the Next Free address. In a vertically cascaded system, the  
write will take place in the device whose /FI=LOW and  
/FF=HIGH, and at the highest-priority location whose  
Validity bit is set HIGH. The validity of the location is set  
by the state of the /VB input, /VB = LOW: Valid, /VB =  
HIGH: Empty. The move is masked by the contents of  
Mask Register nnn. When nnn=000 no mask is used; when  
masking is selected, only bits in the addressed location  
that correspond to LOW values in the selected mask  
register are updated. DSC must be LOW.  
Mnemonic:  
Binary Op-Code:  
XXX XXX 000 001  
/W: HIGH /AV: HIGH PA:AA: HPMA Scope: HPD  
Description: Reads data from bits 31-0 (DSC LOW) or  
63-32 (DSC HIGH) of the location defined by the  
highest-priority matching location to the DQ31-0 bus. In  
the event that the previous Comparison cycle resulted in a  
mismatch, the DQ31-0 bus will remain in high-impedance.  
The Next Highest-Priority Matching location is selected  
and its address appears on the PA:AA bus lines.  
Control State:  
Move Data from Comparand  
Register to Highest-Priority  
Matching Location  
DATA MOVE  
Mnemonic:  
Binary Op-Code:  
MOV [HPM],CR{MRnnn}  
XXX nnn 001 110  
Control State:  
Move Data from Comparand  
Register to Memory Indirect  
MOV [AR],CR{MRnnn}  
XXX nnn 001 100  
/W: LOW /AV: HIGH PA:AA: HPMA Scope: HPD  
Description: Moves data from the Comparand register to  
the Highest-Priority Matching address from the previous  
Comparison cycle. The validity of the location is set by the  
state of the /VB input, /VB = LOW: Valid, /VB = HIGH:  
Empty. The move is masked by the contents of Mask  
Register nnn. When nnn=000 no mask is used; when  
masking is selected, only bits in the addressed location  
that correspond to LOW values in the selected mask  
register are updated. DSC must be LOW.  
Mnemonic:  
Binary Op-Code:  
/W: LOW /AV: HIGH PA:AA: aaa Scope: AS  
Description: Moves data from the Comparand register to  
the memory address defined by the contents of the  
Address register. The validity of the location is set by the  
state of the /VB input, /VB = LOW: Valid, /VB = HIGH:  
Empty. The move is masked by the contents of Mask  
Register nnn. When nnn=000 no mask is used; when  
masking is selected, only bits in the addressed location  
that correspond to LOW values in the selected mask  
register are updated. DSC must be LOW.  
22  
Rev. 8.04  
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