MU9C RCP Family
Control State Descriptions
Table 5: Status Register Bit Assignments
Bit(s)
31
Names
Reserved
/MF
Description
Set to 0
30
0 = Match in CAM
1 = No match in CAM
29
28
/MM
/FF
0 = Multiple match in CAM
1 = No multiple match in CAM
0 = Full
1 = Not full
27:26
25:24
Reserved
Set to 0
Active Address Type
00 = Match address
01 = Memory access
10 = Reserved
11 = Reset state
23:20
19:16
15:13
12:0
Reserved
Set to 0
Page Address PA3-0
Reserved
Page Address
Set to 0
Active Address AA12-0
Active Address (AA12 is set to 0 on MU9C4K)
Table 6: Next Free Register Bit Assignments
Bit(s)
31:20
19:16
15:13
12:0
Names
Description
Set to 0
Reserved
Page Address PA3-0
Reserved
Page Address
Set to 0
Next Free Address NF12-0 Next Free Address (NF12 is set to 0 on MU9C4K)
Table 7: Device Select Register Bit Assignments
Bit(s)
31:9
8
Names
Description
Reserved
Set to 0
SELEN
0 = Enable Select 1 = Disable Select
Set to 0
7:4
Reserved
3:0
Device Select DS3-0
Device Select when PA3-0 = DS3-0 and SELEN = 0
26
Rev. 8.04
MUSIC [ MUSIC SEMICONDUCTORS ]
