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MU9C8K64-90TDI 参数 Datasheet PDF下载

MU9C8K64-90TDI图片预览
型号: MU9C8K64-90TDI
PDF下载: 下载PDF文件 查看货源
内容描述: MU9C RCP家庭 [MU9C RCP Family]
分类和应用: 存储内存集成电路静态存储器双倍数据速率
文件页数/大小: 35 页 / 1040 K
品牌: MUSIC [ MUSIC SEMICONDUCTORS ]
 浏览型号MU9C8K64-90TDI的Datasheet PDF文件第25页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第26页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第27页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第28页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第30页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第31页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第32页浏览型号MU9C8K64-90TDI的Datasheet PDF文件第33页  
Switching Characteristics  
MU9C RCP Family  
SWITCHING CHARACTERISTICS  
SPEEDGRADE  
-50  
Device  
4K64  
Temp.  
COM.  
IND.  
-35  
N/A  
N/A  
-40  
N/A  
N/A  
-70  
-90  
N/A  
8K64  
COM.  
IND.  
N/A  
N/A  
N/A  
16K64 / 24K64/ 32K64 (MCM)  
COM.  
IND.  
N/A  
N/A  
N/A  
N/A  
N/A  
No. Symbol  
1a tELEL  
1b tELEL  
2a tELEH  
2b tELEH  
Parameter (All times in nanoseconds)  
Min Max Min Max Min Max Min Max Min Max Notes  
Chip Enable Cycle Time (Other Cycles)  
40  
35  
30  
25  
9
40  
40  
30  
30  
10  
5
50  
50  
40  
40  
10  
5
50  
70  
40  
60  
10  
5
50  
90  
40  
75  
10  
8
3
4
3
4
Chip Enable Cycle Time (Compare Cycles)  
Chip Enable LOW Pulse Width (Other Cycles)  
Chip Enable LOW Pulse Width (Compare Cycles)  
Chip Enable HIGH Pulse Width  
3
4
5
6
7
tEHEL  
tCVEL  
tELCX  
tELQX  
tELQV  
Control Input to Chip Enable LOW Setup Time  
Control Input to Chip Enable LOW HoldTime  
Chip Enable LOW to Outputs Active  
5
5
5
6
6
7
6
4
4
4
4
4
5
5
5
5
5
Chip Enable LOW to Outputs Valid  
Register  
Memory  
30  
35  
10  
35  
40  
10  
40  
50  
10  
40  
50  
10  
40  
70  
10  
8
9
tEHQZ  
tDVEL  
Chip Enable HIGH to Outputs High-Z  
Data to Chip Enable LOW Setup Time  
2
4
4
2
4
4
5
0
2
4
4
5
0
2
4
4
5
0
2
4
4
5
0
10 tELDX  
Data from Chip Enable LOW Hold  
Time  
Commercial  
Industrial n/a  
11 tFIVEL  
12 tFIVFFV  
13 tEHFFV  
14 tEHQX  
15 tEHQV  
16 tMIVEL  
17 tEHMX  
Full In Valid to Chip Enable LOW Setup Time  
Full In Valid to Full Flag Valid  
0
5
6
8
8
9
Chip Enable HIGH to Full Flag Valid  
Chip Enable HIGH to Output Change  
Chip Enable HIGH to Output Valid  
15  
15  
16  
16  
16  
2
2
2
2
2
15  
18  
22  
22  
25  
Match In Valid to Chip Enable Low Setup Time  
Chip Enable HIGH to Match Flag Change  
4
2
6
2
8
2
8
2
10  
2
4K64 and 8K64 FLAG TIMING  
18 tEHMV  
Chip Enable HIGH to Match Flag  
Valid  
/MF  
12  
15  
42  
5
14  
15  
50  
6
15  
15  
60  
8
17  
17  
n/a  
8
20  
20  
n/a  
9
/MM  
19 tELMV  
Chip Enable LOW to Match Flag Valid  
Match In Valid to Match Flag Valid  
20 tMIVMV  
/MF  
/MM  
7
7
8
8
9
16K64, 24K64, and 32K64 MCM FLAG TIMING  
18 tEHMV  
Chip Enable HIGH to Match Flag  
Valid  
/MF  
n/a  
n/a  
n/a  
n/a  
n/a  
n/a  
n/a  
n/a  
n/a  
n/a  
35  
40  
75  
21  
23  
40  
45  
75  
23  
23  
50  
55  
75  
27  
27  
/MM  
19 tELMV  
Chip Enable LOW to Match Flag Valid  
Match In Valid to Match Flag Valid  
20 tMIVMV  
/MF  
/MM  
21 tOEHQZ  
22 tOELQV  
Output Enable HIGH to Outputs High-Z  
2
10  
8
2
10  
10  
2
10  
12  
2
10  
12  
2
10  
14  
Output Enable LOW to Match Addess Outputs  
Valid  
23 tMIVOEL  
Match In Valid to Output Enable LOW  
Full In Valid to Output Enable LOW  
Chip Enable HIGH to Reset LOW  
Reset Pulse Width  
3
3
3
3
3
3
3
3
3
3
24 tFIVOEL  
25 tEHRSTL  
10  
25  
10  
20  
20  
2
15  
30  
15  
20  
20  
2
20  
50  
20  
20  
20  
2
20  
50  
20  
20  
20  
2
20  
50  
20  
20  
20  
2
26 tRSTLRSTH  
27 tRSTHEL  
8
Reset HIGH to Chip Enable LOW  
Test Input Valid to TCLK HIGH Setup Time  
TCLK HIGH to Test Input Hold Time  
TCLK LOW to TDO Change  
28 tTIVTCLKH  
29 tTCLKHTIX  
30 tTCLKLTDOX  
31 tTCLKLTDOV  
32 tTCLKLTDOZ  
9
9
10  
20  
10  
20  
10  
20  
10  
20  
10  
20  
TCLK LOW to TDO Valid  
TCLK LOW to TDO High-Z  
20  
20  
20  
20  
20  
Rev. 8.04  
29  
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