MII Serial Management Channel Timing (MII_MDIO, MII_MDC)
13.4 MII Serial Management Channel Timing
(MII_MDIO, MII_MDC)
Table 13-30 provides information on the MII serial management channel signal timing. The
FEC functions correctly with a maximum MDC frequency in excess of 2.5 MHz. The exact
upper bound is under investigation.
Table 13-30. MII Serial Management Channel Timing
Num
Characteristic
Min
Max
Unit
M10 MII_MDC falling edge to MII_MDIO output invalid (minimum
propagation delay)
0
—
ns
M11 MII_MDC falling edge to MII_MDIO output valid (max prop delay)
M12 MII_MDIO (input) to MII_MDC rising edge setup
M13 MII_MDIO (input) to MII_MDC rising edge hold
M14 MII_MDC pulse width high
—
10
25
—
ns
ns
ns
0
—
40%
60%
MII_MDC
period
M15 MII_MDC pulse width low
40%
60%
MII_MDC
period
Figure 13-73 shows the MII serial management channel timing diagram.
M14
MM15
MII_MDC (Output)
M10
MII_MDIO (Output)
M11
MII_MDIO (Input)
M12
M13
Figure 13-73. MII Serial Management Channel Timing Diagram
MOTOROLA
MPC860 Family Hardware Specifications
69
MOTOROLA [ MOTOROLA ]
