Pin Assignments
14.1 Pin Assignments
Figure 14-74 shows the top view pinout of the PBGA package. For additional information,
see the MPC860 PowerQUICC User’s Manual, or the MPC855T User’s Manual.
NOTE:This is the top view of the device.
W
PD10 PD8
PD14 PD13 PD9
PA0 PB14 PD15
PD3
IRQ7 D0
D4
D1
D2
D3
D5
VDDL
D20
D6
D7
D29
DP1
DP2 CLKOUT IPA3
V
U
T
VSSSYN1
N/C
PD6 M_Tx_EN IRQ0 D13
D27
D10
D14
D18
D24
D28
DP3
DP0
PD4
PD5 IRQ1
D8
D23
D17
D11
D9
D16
D15
D19
D22
D21
D25
D26
D31
D30 IPA5 IPA4 IPA2
IPA6 IPA0 IPA1 IPA7
N/C VSSSYN
XFC VDDSYN
PA1
PC6
PC5 PC4 PD11
PA2 PB15 PD12
PD7 VDDH D12
VDDH
R
P
N
M
L
VDDH
WAIT_B WAIT_A
VDDL RSTCONF
KAPWR
PORESET
SRESET
PA4 PB17 PA3 VDDL
PB19 PA5 PB18 PB16
GND
GND
XTAL
TEXP
HRESET
EXTCLK EXTAL
PA7
PC8
PA6
PC7
BADDR28
AS
MODCK2
OP0
BADDR29
VDDL
PB22 PC9
PA8 PB20
OP1 MODCK1
K
J
PC10 PA9 PB23 PB21
PC11 PB24 PA10 PB25
GND
BADDR30 IPB6 ALEA IRQ4
IPB5 IPB1 IPB2 ALEB
M_COL IRQ2 IPB0 IPB7
H
G
F
VDDL M_MDIO TDI
TCK
TRST TMS TDO PA11
PB26 PC12 PA12 VDDL
PB27 PC13 PA13 PB29
PB28 PC14 PA14 PC15
BR
VDDL
CS3
IRQ6 IPB4 IPB3
GND
GND
TS
BI
IRQ3 BURST
VDDH
VDDH
CS6
E
D
C
B
A
BG
BB
A8
A9
N/C
A12
A13
N/C
A16
A17
A15
A20
A21
A19
A24
A23
A25
A18 BSA0 GPLA0 N/C
CS2 GPLA5 BDIP TEA
PB30 PA15 PB31
A3
A6
A26 TSIZ1 BSA1 WE0 GPLA1 GPLA3 CS7
CS0
TA GPLA4
A0
19
A1
A4
A10
A22 TSIZ0 BSA3 M_CRS WE2 GPLA2 CS5 CE1A WR GPLB4
A2
18
A5
17
A7
16
A11
15
A14
14
A27
13
A29
12
A30
11
A28
10
A31 VDDL BSA2 WE1 WE3 CS4 CE2A CS1
9
8
7
6
5
4
3
2
1
Figure 14-74. Pinout of the PBGA Package
72
MPC860 Family Hardware Specifications
MOTOROLA
MOTOROLA [ MOTOROLA ]
