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XPC860PCZP50D3 参数 Datasheet PDF下载

XPC860PCZP50D3图片预览
型号: XPC860PCZP50D3
PDF下载: 下载PDF文件 查看货源
内容描述: 系列硬件规格 [Family Hardware Specifications]
分类和应用:
文件页数/大小: 76 页 / 805 K
品牌: MOTOROLA [ MOTOROLA ]
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I2C AC Electrical Specifications  
2
11.11I C AC Electrical Specifications  
Table 11-24 provides the I2C (SCL < 100 kHz) timings.  
2
Table 11-24. I C Timing (SCL < 100 kHZ)  
All Frequencies  
Num  
Characteristic  
Unit  
Min  
Max  
200 SCL clock frequency (slave)  
200 SCL clock frequency (master)  
0
100  
100  
kHz  
kHz  
µs  
µs  
µs  
µs  
µs  
µs  
ns  
1
1.5  
4.7  
4.7  
4.0  
4.7  
4.0  
0
202 Bus free time between transmissions  
203 Low period of SCL  
204 High period of SCL  
205 Start condition setup time  
206 Start condition hold time  
207 Data hold time  
208 Data setup time  
250  
209 SDL/SCL rise time  
1
µs  
ns  
210 SDL/SCL fall time  
300  
211 Stop condition setup time  
4.7  
µs  
1
SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3 × pre_scaler × 2).  
The ratio SYNCCLK/(BRGCLK / pre_scaler) must be greater or equal to 4/1.  
Table 11-25 provides the I2C (SCL > 100 kHz) timings.  
2
Table 11-25. . I C Timing (SCL > 100 kHZ)  
All Frequencies  
Num  
Characteristic  
Expression  
Unit  
Min  
Max  
200 SCL clock frequency (slave)  
200 SCL clock frequency (master)  
fSCL  
fSCL  
0
BRGCLK/48  
Hz  
Hz  
s
1
BRGCLK/16512  
1/(2.2 * fSCL)  
1/(2.2 * fSCL)  
1/(2.2 * fSCL)  
1/(2.2 * fSCL)  
1/(2.2 * fSCL)  
0
BRGCLK/48  
202 Bus free time between transmissions  
203 Low period of SCL  
s
204 High period of SCL  
205 Start condition setup time  
206 Start condition hold time  
207 Data hold time  
s
s
s
s
208 Data setup time  
1/(40 * fSCL)  
s
209 SDL/SCL rise time  
1/(10 * fSCL)  
1/(33 * fSCL)  
s
210 SDL/SCL fall time  
s
211 Stop condition setup time  
1/2(2.2 * fSCL)  
s
64  
MPC860 Family Hardware Specifications  
MOTOROLA  
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