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XC68HC912D60FU8 参数 Datasheet PDF下载

XC68HC912D60FU8图片预览
型号: XC68HC912D60FU8
PDF下载: 下载PDF文件 查看货源
内容描述: 超前信息 - 冯4.0 [Advance Information - Rev 4.0]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 432 页 / 2948 K
品牌: MOTOROLA [ MOTOROLA ]
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Freescale Semiconductor, Inc.  
Pinout and Signal Descriptions  
3.6.2 Port B  
Port B pins are used for address and data in expanded modes. In single  
chip modes, the pins can be used as I/O. The port data register is not in  
the address map during expanded and peripheral mode operation.  
When it is in the map, port B can be read or written at anytime.  
Register DDRB determines whether each port B pin is an input or output.  
DDRB is not in the address map during expanded and peripheral mode  
operation. Setting a bit in DDRB makes the corresponding bit in port B  
an output; clearing a bit in DDRB makes the corresponding bit in port B  
an input. The default reset state of DDRB is all zeros.  
When the PUPB bit in the PUCR register is set, all port B input pins are  
pulled-up internally by an active pull-up device. This bit has no effect if  
the port is being used in expanded modes as the pull-ups are inactive.  
Setting the RDPB bit in register RDRIV causes all port B outputs to have  
reduced drive level. RDRIV can be written once after reset. RDRIV is not  
in the address map in peripheral mode. Refer to Bus Control and  
Input/Output.  
3.6.3 Port E  
Port E pins operate differently from port A and B pins. Port E pins are  
used for bus control signals and interrupt service request signals. When  
a pin is not used for one of these specific functions, it can be used as  
general-purpose I/O. However, two of the pins (PE[1:0]) can only be  
used for input, and the states of these pins can be read in the port data  
register even when they are used for IRQ and XIRQ.  
The PEAR register determines pin function, and register DDRE  
determines whether each pin is an input or output when it is used for  
general-purpose I/O. PEAR settings override DDRE settings. Because  
PE[1:0] are input-only pins, only DDRE[7:2] have effect. Setting a bit in  
the DDRE register makes the corresponding bit in port E an output;  
clearing a bit in the DDRE register makes the corresponding bit in port E  
an input. The default reset state of DDRE is all zeros.  
Advance Information  
54  
68HC(9)12D60 — Rev 4.0  
Pinout and Signal Descriptions  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  
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