Freescale Semiconductor, Inc.
Motorola Interconnect Bus
Message validation
T8
Transmit buffer
LOOPS
WOMS
RSRC
M
10/11-bit TX shift register
TxD0
H 8 7
0 L
WAKE
ILT
MCLK
clock
WOMS
PE
MIE
Transmitter
control
PT
PT
TE
SBK
TIE
Flag control
TCIE
RIE
ILIE
TE
MIE
RE
RE
Receiver
control
RWU
SBK
WOMS
SCSWAI
MIE
MDL1
MDL0
10/11-bit RX shift register
Data
recovery
RxD0
8 7
0
STOP
START
R8
Receive buffer
RAF
SC0SR1
IDLE
ILIE
&
&
RDRF
&
RIE
SCI interrupt request
+
TC
TCIE
Note: † = always reads as zero
= not used in MI Bus mode
TDRE
TIE
&
Internal data bus
Figure 16-3. MI BUS Block Diagram
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
267
Motorola Interconnect Bus
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