Freescale Semiconductor, Inc.
Enhanced Capture Timer
Timer Registers
Bit 7
C7I
0
6
C6I
0
5
C5I
0
4
C4I
0
3
C3I
0
2
C2I
0
1
C1I
0
Bit 0
C0I
RESET:
0
TMSK1 — Timer Interrupt Mask 1
$008C
Read or write anytime.
The bits in TMSK1 correspond bit-for-bit with the bits in the TFLG1 status
register. If cleared, the corresponding flag is disabled from causing a
hardware interrupt. If set, the corresponding flag is enabled to cause a
hardware interrupt.
Read or write anytime.
C7I–C0I — Input Capture/Output Compare “x” Interrupt Enable.
Bit 7
TOI
0
6
0
0
5
PUPT
0
4
RDPT
0
3
TCRE
0
2
PR2
0
1
PR1
0
Bit 0
PR0
0
RESET:
TMSK2 — Timer Interrupt Mask 2
$008D
Read or write anytime.
TOI — Timer Overflow Interrupt Enable
0 = Interrupt inhibited
1 = Hardware interrupt requested when TOF flag set
PUPT — Timer Port Pull-Up Resistor Enable
This enable bit controls pull-up resistors on the timer port pins when
the pins are configured as inputs.
0 = Disable pull-up resistor function
1 = Enable pull-up resistor function
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
Enhanced Capture Timer
213
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