Freescale Semiconductor, Inc.
I/O Ports with Key Wake-up
Key Wake-up and Port Registers
Bit 7
DDG7
0
6
DDG6
0
5
DDG5
0
4
DDG4
0
3
DDG3
0
2
DDG2
0
1
DDG1
0
Bit 0
DDG0
0
RESET:
DDRG — Port G Data Direction Register
$002A
Data direction register G is associated with port G and designates each
pin as an input or output.
Read and write anytime
0 = Associated pin is an input
1 = Associated pin is an output
Bit 7
DDH7
0
6
DDH6
0
5
DDH5
0
4
DDH4
0
3
DDH3
0
2
DDH2
0
1
DDH1
0
Bit 0
DDH0
0
RESET:
DDRH — Port H Data Direction Register
$002B
Data direction register H is associated with port H and designates each
pin as an input or output.
Read and write anytime.
0 = Associated pin is an input
1 = Associated pin is an output
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
I/O Ports with Key Wake-up
137
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