Freescale Semiconductor, Inc.
EEPROM Memory
8.5 EEPROM Control Registers
Bit 7
6
5
4
3
1
1
2
1
Bit 0
EERC
0
1(1)
1(1)
NOBDML
NOSHB
EESWAI PROTLCK
(2)
(2)
(2)
(2)
RESET:
1
0
—
—
—
—
EEMCR — EEPROM Module Configuration
$00F0
1. Bits 4 and 5 have test functions and should not be cleared (set to ‘0’).
2. Loaded from SHADOW byte.
Bits[7:4] are loaded at reset from the EEPROM SHADOW byte.
NOTE: Bits 5 and 4 are reserved for test purposes. These locations in the
SHADOW byte should not be programmed otherwise some locations in
the regular EEPROM array will no longer be visible.
NOBDML — Background Debug Mode Lockout Disable
0 = The BDM lockout is enabled.
1 = The BDM lockout is disabled.
Loaded from SHADOW byte at reset.
Read anytime. Write anytime in special modes (SMODN=0).
NOSHB — SHADOW Byte Disable
0 = SHADOW byte enabled and accessible at address $0FC0.
1 = Regular EEPROM array at address $0FC0.
Loaded from SHADOW byte at reset.
Read anytime. Write anytime in special modes (SMODN=0).
When NOSHB cleared, the regular EEPROM array byte at address
$0FC0 is no longer visible. The SHADOW byte is accessed instead
for both read and program/erase operations. BULK, ODD and EVEN
program/erase only apply if the SHADOW byte is enabled.
NOTE: Bit 6 of the SHADOW byte should not be cleared (set to '0') in order to
have the full EEPROM array visible. If Bit 6 from the SHADOW byte is
cleared then the following thirty-one bytes $0FC1–$0FFF have no
meaning and are reserved by Motorola.
Advance Information
118
68HC(9)12D60 — Rev 4.0
MOTOROLA
EEPROM Memory
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MOTOROLA [ MOTOROLA ]
