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MC145151DW2 参数 Datasheet PDF下载

MC145151DW2图片预览
型号: MC145151DW2
PDF下载: 下载PDF文件 查看货源
内容描述: 并行输入锁相环频率合成器 [Parallel-Input PLL Frequency Synthesizer]
分类和应用: 信号电路锁相环或频率合成电路光电二极管
文件页数/大小: 36 页 / 718 K
品牌: MOTOROLA [ MOTOROLA ]
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SEMICONDUCTOR TECHNICAL DATA  
P SUFFIX  
PLASTIC DIP  
CASE 738  
Interfaces with Dual–Modulus Prescalers  
20  
1
The MC145156–2 is programmed by a clocked, serial input, 19–bit data  
stream. The device features consist of a reference oscillator, selectable–refer-  
ence divider, digital–phase detector, 10–bit programmable divide–by–N  
counter, 7–bit programmable divide–by–A counter, and the necessary shift  
register and latch circuitry for accepting serial input data.  
The MC145156–2 is an improved–performance drop–in replacement for the  
MC145156–1. Power consumption has decreased and ESD and latch–up  
performance have improved.  
DW SUFFIX  
SOG PACKAGE  
CASE 751D  
20  
1
ORDERING INFORMATION  
MC145156P2  
MC145156DW2 SOG Package  
Plastic DIP  
Operating Temperature Range: – 40 to 85°C  
Low Power Consumption Through Use of CMOS Technology  
3.0 to 9.0 V Supply Range  
On– or Off–Chip Reference Oscillator Operation with Buffered Output  
Compatible with the Serial Peripheral Interface (SPI) on CMOS MCUs  
Lock Detect Signal  
PIN ASSIGNMENT  
RA1  
RA2  
1
2
20  
19  
RA0  
Two Open–Drain Switch Outputs  
Dual Modulus/Serial Programming  
OSC  
in  
φ
3
4
18  
17  
OSC  
V
out  
8 User–Selectable ÷ R Values: 8, 64, 128, 256, 640, 1000, 1024, 2048  
÷ N Range = 3 to 1023, ÷ A Range = 0 to 127  
“Linearized” Digital Phase Detector Enhances Transfer Function Linearity  
Two Error Signal Options: Single–Ended (Three–State) or Double–Ended  
Chip Complexity: 6504 FETs or 1626 Equivalent Gates  
φ
REF  
R
out  
V
5
6
16  
15  
TEST  
DD  
PD  
V
SW2  
SW1  
ENB  
DATA  
CLK  
out  
SS  
7
14  
13  
12  
11  
MC  
LD  
8
9
f
10  
in  
REV 1  
8/95  
Motorola, Inc. 1995  
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