V58C2128(804/404/164)S
Figure 36 - DATA INPUT (WRITE) TIMING
t
t
DSL DSH
DQS
t
DS
DI
n
DQ
DM
t
DH
t
DS
t
DH
DON'T CARE
DI n = Data In for column n
Burst Length = 4 in the case shown
3 subsequent elements of Data In are applied in the programmed
order following DI n
Figure 37 - DATA OUTPUT (READ) TIMING
t
DQSQ
nom
t
DQSQ
max
t
DQSQ
max
DQS
DQ
t
t
DQSQ
min
DQSQ
min
1. tDQSQ max occurs when DQS is the earliest among DQS and DQ signals to transition.
2. tDQSQ min occurs when DQS is the latest among DQS and DQ signals to transition.
3. tDQSQ nom, shown for reference, occurs when DQS transitions in the center among DQ signal transitions.
DQS, DQ
t
DV
Burst Length = 4 in the case shown
V58C2128(804/404/164)S Rev. 1.6 March 2002
47
MOSEL [ MOSEL VITELIC, CORP ]
